Sidewall doping technique for SOI transistors

A process for fabricating a semiconductor-on-insulator integrated circuit structure, comprising the steps of:

• providing a substrate having at a surface thereof a layer of monocrystalline semiconductor material overlying an insulator layer;
• depositing an oxide layer, covering said monocrystalline semiconductor layer;
• depositing a patterning a masking layer comprising a polysilicon layer and a nitride layer over said oxide layer, said masking layer being patterned to cover predetermined portions of said monocrystalline semiconductor layer where active devices are to be formed;
• etching said patterned masking layer down to said oxide layer;
• depositing nitride, to form sidewall spacers on said patterned masking layer, so that said patterned masking layer with said spacers covers a larger fraction of said semiconductor layer than was covered by said masking layer along;
• etching away at least some portions of said monocrystalline semiconductor material, using said patterned masking layer and said spacers as a mask to form a mesa with edges;
• forming sidewall insulation filaments on said monocrystalline semiconductor material, so that said monocrystalline semiconductor layer with said filaments covers a larger fraction of said semiconductor layer than was covered by said masking layer along;
• stripping said nitride and said nitride layer, leaving the polysilicon masking layer of the patterned masking layers intact;
• implanting a dopant substantially into at least some of the portions of said semiconductor material which are not covered by said polysilicon masking layer to form doped mesa edges;
• removing said polysilicon masking layer, and;
• fabricating active devices in said mesas.