Semiconductor device having an overlapping memory cell

A semiconductor device having an overlapping memory cell comprising:

• a semiconductor substrate having first and second active regions;
• a first driver transistor in the first active region, the driver transistor having a gate electrode overlying a first portion the first active region and making a metallurgical contact to a first portion of the second active region;
• a second driver transistor in the second active region, the second driver transistor having a gate electrode overlying a second portion of the second active region and making a metallurgical contact to a second portion of the first active region;
• a first access transistor in the first active region having a gate electrode formed by a portion of a first wordline overlying a third portion of the first active region, wherein the first wordline intersects a portion of the gate electrode of the first driver transistor;
• and
• a second access transistor in the second active region having a gate electrode formed by a portion of a second wordline overlying a third portion of the second active region, wherein a second portion of the second wordline intersects a portion of the gate electrode of the second driver transistor.

A semiconductor device having an overlapping memory cell comprising:

• a semiconductor substrate having first and second opposed
• a semiconductor substrate having first and second opposed active regions therein;
• alternating driver and access transistors at opposite ends of the first and second active regions,
• each driver transistor having a gate electrode overlying a first portion of each active region, and
• each access transistor having a gate electrode formed by a unitary wordline overlying a second portion of each active region and extending between the first and second active regions, wherein the wordline overlies the corresponding driver transistor gate electrode and is electrically isolated from the driver transistor gate electrode;
• and
• first and second interconnect means electrically coupling the gate electrodes of the driver transistors to the opposite active region.

A semiconductor device having an overlapping memory cell comprising:

• a semiconductor substrate having first and second opposed active regions therein;
• alternating driver and access transistors at opposite ends of the first and second active regions,
• each driver transistor having a gate electrode overlying a first portion of each active region, and
• each access transistor having a gate electrode formed by a wordline overlying a second portion of each active region and extending between the first and second active regions, wherein the wordline overlies the corresponding driver transistor gate electrode and is electrically isolated from the driver transistor gate electrode;
• and
• first and second interconnect means electrically coupling the gate electrodes of the driver transistors to the opposite active region,
• wherein the each of the first and second interconnect means comprises,
• a projected portion of each driver transistor gate electrode protruding from a lower portion of the gate electrode;
• an insulating layer encapsulating the wordline and overlying the sidewalls of the driver transistor gate electrode;
• a conductive sidewall layer overlying and in electrical contact with the projected portion of the driver transistor gate electrode, wherein the sidewall layer overlies the edge of the driver transistor gate electrode and is separated therefrom by the insulating layer, and wherein the sidewall layer extends along the edge of the wordline to the opposite active region;
• a contact opening in each active region adjacent to the gate electrode of the access transistor;
• and
• a metallurgic contact formed between the conductive sidewall layer and the active region.