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US 5,233,217 AGranted
Plug contact with antifuse
AssigneeCrosspoint Solutions, Inc.
InventorsPankaj Dixit, Monta R. Holzworth, Richard Klein, William P. Ingram, III
Life of this patent
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AssigneeCrosspoint Solutions, Inc.
InventorsPankaj Dixit, Monta R. Holzworth, Richard Klein, William P. Ingram, III
Estimating the term…
An antifuse particularly suitable for submicron geometries is presented. The antifuse is formed between a silicon layer, which could be a doped region of the semiconductor substrate, an epitaxial layer or a polysilicon layer, and an upper metal interconnection layer. In contact holes in a silicon dioxide layer insulating the silicon and metal interconnection layers from each other, the antifuses have a thick refractory metal layer having a top surface approximately at the same level as the top surface of the insulating layer. Depending upon the process used to deposit the refractory metal layer, a thin adhesion layer may be located immediately below the refractory metal layer. Between the underlying silicon layer and upper interconnection layer, a thin semiconductor material layer of amorphous silicon may be located either below the refractory metal layer or above it. At its bottom, the interconnection layer also has a barrier layer to prevent any intermixing between the amorphous silicon layer and the metal interconnection layer.
An antifuse in an integrated circuit device, said integrated circuit device formed within and on a semiconductor substrate, said antifuse comprising
Antifuse and contact structures in an integrated circuit device, said structures comprising:
Antifuse and contact structures in an integrated circuit device, said structures comprising:
Dependencies are inferred from the claim text.