US 5,212,618 A · Electrostatic discharge clamp using vertical NPN transistor

Abstract

An electrostatic discharge protection clamp particularly useful for with bipolar and biCMOS integrated circuits include an NPN transistor formed in an isolated tub in an epitaxial layer grown on a substrate. The collector of the NPN transistor is connected to the input terminal, and the emitter of the NPN transistor is connected to the substrate. A resistor interconnects the base and the emitter. Advantageously, the P-doped base can abut the P-doped isolation region forming the tub, and the P-doped isolation region can interconnect the emitter to the substrate. Below BV.sub.CES the clamp will look like an open circuit, and above BV.sub.CES the transistor will start conducting current. The transistor will break down collector to base. Conduction of the transistor causes a voltage drop across the base-emitter junction, and when this voltage drop exceeds the base-emitter forward voltage the transistor will turn on. Once the transistor is turned on and current starts flowing in the emitter, avalanche effects will cause the breakdown voltage to snap back to BV.sub.CEO and remain there until the emitter current drops below some low level, which will be at the end of the electrostatic discharge pulse. In the negative direction the tub to substrate diode provides an effective clamp which will clamp the voltage to a low value and limit the power dissipation in the junction. Alternatively, a bidirectional clamp can be provided in which a second NPN transistor is fabricated in the tub with the emitter of the second transistor connected to the input terminal and the collectors of the two transistors being interconnected by the N-doped epitaxial layer of the tub. The dopant conductivities can be reversed.

Claims21

Dependent claims

An electrostatic discharge protection clamp for an input terminal to an integrated circuit comprising:

a semiconductor substrate of one conductivity type,
a first semiconductor region of opposite conductive type abutting a surface of said substrate,
a vertical bipolar transistor formed in said first semiconductor region and having emitter, base, and collector regions, with said collector region being coupled to said input terminal and diode-connected to said substrate, and with said base region being coupled to said emitter region via a current limiting resistive elements, said vertical bipolar transistor having a collector-base breakdown voltage below a pre-selected voltage level such that said vertical bipolar transistor is inactive at input voltages applied to said input terminal below the pre-selected breakdown voltage and forms a current path for discharging excess charge on said input terminal when said input voltage exceeds the pre-selected voltage level.

A bidirectional electrostatic discharge protection clamp for an input terminal to an integrated circuit, said protection clamp being disposed to prevent first and second preselected electrostatic discharge voltages of first and second polarities impressed upon said input terminal from exceeding first and second breakdown voltages characteristic of first and second vertical bipolar transistors, respectively, comprising:

a semiconductor substrate of one conductivity type,
a first semiconductor region of opposite conductivity type abutting a surface of said substrate,
first and second vertical bipolar transistors formed in said first semiconductor region, each of said transistors having an emitter, a base, a collector, and an input terminal, said first and second vertical bipolar transistors being inactive at input voltages applied to said input terminal below the first and second pre-selected voltages, respectively, and forming first and second current paths for discharging excess charge on said input terminal when said input voltage exceeds the first pre-selected voltages, respectively,
first interconnect means connecting said emitter of said first transistor to said input terminal,
first resistive means connecting said base of said first transistor to said input terminal,
second interconnect means connecting said emitter of said second transistor to said substrate, and
second resistive means connecting said base of said second transistor to said substrate.

4 more elements

A bidirectional electrostatic discharge protection clamp for an input terminal to an integrated circuit, said protection clamp being disposed to prevent electrostatic discharge voltages of first and second polarities impressed upon said input terminal from exceeding first and second breakdown voltages characteristic of first and second vertical bipolar transistors, respectively, comprising:

a P-doped semiconductor substrate,
an N-doped layer grown on a surface of said P-doped semiconductor substrate,
a P-doped isolation region extending from a surface of said N-doped layer to said substrate and surrounding a tub of said N-doped layer,
first and second NPN bipolar transistors formed in said tub, each of said transistors having a collector diode-connected to said substrate comprising said N-doped layer in said tub, each of said transistors having a base comprising P-doped regions in said N-doped layer in said tub, and each of said transistors having an N-doped emitter in one of said P-doped regions wherein said first and second bipolar transistors have collector-base breakdown voltages such that said transistors are inactive at input voltages applied to said input terminal below the first and second breakdown voltages, respectively,
interconnect means connecting said emitter of said first transistor to said input terminal, first resistive means connecting said base of said first transistor to said input terminal, and
second resistive means connecting said base of said second transistor to said substrate.

3 more elements

Dependencies are inferred from the claim text.

Electrostatic discharge clamp using vertical NPN transistor

Life of this patent

Electrostatic discharge clamp using vertical NPN transistor

Life of this patent

Abstract

Claims21