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US 5,210,683 AGranted
Recessed chip capacitor wells with cleaning channels on integrated circuit packages
AssigneeLSI Logic Corporation
InventorTom Ley
Life of this patent
Estimating the term…
Abstract
Wells are formed in an external surface of a semiconductor device package body. Capacitors are disposed within the wells at least partially, and preferably fully within the body. Cleaning channels are formed underneath the capacitors, for removing residual flux and/or solder.
Claims8
A semiconductor device package comprising:
- a body having length, width and breadth and occupying a spatial volume, and having a flat exterior surface;
- a die-receiving opening extending into the flat exterior surface of the body;
- at least one capacitor-receiving opening extending into the flat exterior surface of the body, separate and distinct from the die-receiving opening;
- and
- a capacitor disposed at least partially within each of the at least one capacitor-receiving openings.
2 more elements
A semiconductor device package comprising:
- a body having an external surface and formed of a series of alternating ceramic layers and conductive layers, one of which layers is a first topmost ceramic layer;
- a die-receiving opening extending from the external surface through at least the first topmost ceramic layer in the series;
- a first hole extending from the external surface through at least the first topmost ceramic layer in the series;
- conductive attachment pads within the first hole;
- a capacitor disposed within the first hole and attached to the conductive attachment pads, such that the capacitor fits at least partially within the body;
- and
- conductive vias extending from the pads to one or more of the conductive layers.
4 more elements
Dependencies are inferred from the claim text.