Semiconductor device having a built-in capacitor and manufacturing method thereof
AssigneeFujitsu Limited
InventorTakahisa Kawai
Life of this patent
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Abstract
A semiconductor device having a built-in capacitor comprises a substrate, an internal electrode provided on a top side of the substrate, a dielectric film provided so as to cover the internal electrode for establishing a predetermined capacitance, a surface electrode provided on the dielectric film so as to make a contact therewith, a plurality of through holes formed in the substrate in correspondence to the internal electrode so as to extend from a bottom side to the top side, and a back-side electrode provided on the bottom side of the substrate including the through holes so as to make a contact with the internal electrode through the through holes.
Claims7
A semiconductor device having a built-in capacitor, comprising:
- a substrate having upper and lower main surfaces;
- an internal electrode formed on said upper main surface of said substrate, said internal electrode comprising a unitary segment of a conductive material, of a given configuration and area in a plane parallel to said upper main surface and having a lower surface on said upper main surface of said substrate and an upper surface;
- a dielectric film formed on an covering said internal electrode;
- a surface electrode formed on said dielectric film and in contact therewith, said surface electrode including at least a portion of a corresponding said configuration and area, in opposed relationship to the internal electrode and separated therefrom by the dielectric film when viewed in a plane transverse to the upper main surface of the substrate, said potion of the surface electrode together with said dielectric film and said internal electrode establishing a single capacitor;
- an array of plural through holes formed in the substrate in correspondence to the single capacitor, said plural through holes extending in substantially parallel and spaced relationship from the lower main surface to the upper main surface of said substrate in a common direction substantially transverse to the lower and upper main surfaces and disposed within said configuration and area of said internal electrode and through which a corresponding array of portions of the lower surface of the internal electrode are exposed;
- and
- a back-side electrode formed as a layer on said lower main surface of said substrate and including an array of plural, integral portions thereof extending through the respective through holes of said array thereof and into contact with the lower surface of the internal electrode at said array of exposed portions thereof.
Dependencies are inferred from the claim text.