Local field enhancement for better programmability of antifuse PROM

A fabrication method to improve programmability of a one time programmable element in an integrated circuit, said method comprising the steps of:

• a) masking a diffusion region adjoining neighboring access lines thereby exposing a portion of said adjoining diffusion region, said diffusion region being a heavily doped as a first conductivity type, said access devices forming active metal oxide transistors having overlying insulation means and dielectric spacers for isolation and said diffusion region for source/drain regions;
• b) trenching through said exposed diffusion region thereby severing said diffusion region and forming edges in said severed diffusion region self-aligned to lower outer surface of said dielectric spacers;
• c) etching back said dielectric spacers thereby exposing said edges of severed diffusion region;
• d) doping said exposed edges thereby forming heavily doped edges having a second conductivity type;
• e) forming a dielectric layer superjacent and coextensive resulting trench, said edges and said dielectric spacers;
• and
• f) forming a conductive layer superjacent and coextensive said dielectric thereby forming a programmable element comprising said dielectric layer sandwiched between said severed diffusion regions and said conductive layer.

A fabrication method to improve programmability to a one time programmable element in an integrated circuit, said method comprising the steps of:

• a) masking an N+ diffusion region adjoining neighboring access lines thereby exposing a portion of said adjoining diffusion region, said access devices forming active metal oxide transistors having overlying insulating means and dielectric spacers for isolation and said N+ diffusion region for source/drain regions;
• b) trenching through said exposed N+ diffusion region thereby severing said N+ diffusion region and forming edges in said severed N+ diffusion region self-aligned to lower outer surface of said dielectric spacers;
• c) etching back said dielectric spacers thereby exposing said edges of severed N+ diffusion region;
• d) forming a dielectric layer superjacent and coextensive resulting trench, said exposed edges and said dielectric spacers;
• and
• e) forming a conductive layer superjacent and coextensive said dielectric thereby forming a programmable antifuse element comprising said dielectric layer sandwiched between said severed N+ diffusion regions and said conductive layer.

A fabrication method to improve programmability of a one time programmable element in an integrated circuit, said method comprising the steps of:

• a) masking an N+ diffusion region adjoining neighboring access lines thereby exposing a portion of said adjoining N+ diffusion region, said access devices forming active metal oxide transistors having overlying insulation means and dielectric spacers for isolation and said N+ diffusion region for source/drain regions;
• b) trenching through said exposed N+ diffusion region thereby severing said diffusion region and forming edges in said severed diffusion region self-aligned to lower outer surface of said dielectric spacers;
• c) etching back said dielectric spacers thereby exposing said edges of severed N+ diffusion region;
• d) doping said exposed edges thereby forming N- doped edges;
• e) forming a dielectric layer superjacent and coextensive resulting trench, said edges and said dielectric spacers;
• and
• f) forming a conductive layer superjacent and coextensive said dielectric thereby forming a programmable antifuse element comprising said dielectric layer sandwiched between said severed N- diffusion regions and said conductive layer.