US 5,182,719 A · Method of fabricating a second semiconductor integrated circuit device from a first semiconductor integrated circuit device

Abstract

A method of fabricating a second semiconductor integrated circuit device includes steps of forming a first semiconductor integrated circuit device which has a microcomputer and is furnished with an EPROM; determining a program for controlling the microcomputer and to be set in the EPROM (performing an initial evaluation) while information is being written into and erased from the EPROM built in the first semiconductor integrated circuit device; and thereafter forming a second semiconductor integrated circuit device in which the EPROM of the first semiconductor integrated circuit device is replaced with a mask ROM. In replacing the EPROM with the mask ROM, the peripheral circuits required for both the EPROM and the mask ROM have their circuit arrangements held basically the same, and specific peripheral circuits for use in only the EPROM have their circuit regions left as they are as logically inactive regions.

Claims17

Dependent claims

A method of fabricating a second semiconductor integrated circuit device, on a semiconductor substrate, from a first semiconductor integrated circuit device on the substrate, which second semiconductor integrated circuit device has a microcomputer and a second nonvolatile memory circuit for only reading information, comprising the step of:

converting the first semiconductor integrated circuit device, on the semiconductor substrate, which first semiconductor integrated circuit device has the microcomputer and a first nonvolatile memory circuit capable of having information electrically written thereinto and capable of having the information erased therefrom, into the second semiconductor integrated circuit device, said first nonvolatile memory circuit including a memory cell array, an information reading circuit for said memory cell array, and an information writing circuit for said memory cell array, said converting step including the sub-steps of (a) leaving a circuit arrangement of an information reading circuit of the first nonvolatile memory circuit substantially unchanged;
(b) revising part of the memory cell array of said first nonvolatile memory circuit of said first semiconductor integrated circuit device;
and (c) bringing the information writing circuit into a logically inactive state.

A method of fabricating a second semiconductor integrated circuit device on a semiconductor substrate from a first semiconductor integrated circuit device on the substrate, the second semiconductor integrated circuit device having a microcomputer and a second nonvolatile memory circuit for only reading information, comprising the step of:

converting the first semiconductor integrated circuit device, which first semiconductor integrated circuit device includes a microcomputer and a first nonvolatile memory circuit capable of having information electrically written thereinto and capable of having the information erased therefrom, into the second semiconductor integrated circuit device, wherein the first nonvolatile memory circuit comprises a memory cell array which includes selecting lines and memory cells, each memory cell being comprised of an MISFET which has a first gate insulating film on the substrate, a floating gate electrode on the first gate insulating film, a second gate insulating film on the floating gate electrode, and a control gate electrode on the second gate insulating film, the first nonvolatile memory circuit further comprising driver circuits each including a switching MISFET which has a source-drain path coupled between a terminal and one of the selecting lines, the selecting lines being coupled to the control gate electrodes of the memory cells, a power source voltage being supplied to the terminal at a read mode and a write voltage higher than said power source voltage being supplied to the terminal at a write mode,
said converting step including sub-steps of:
reversing part of the memory cell array of the first nonvolatile memory circuit in such a manner that each MISFET of each memory cell has a gate insulating film on the substrate and a gate electrode on the gate insulating film coupled to a selecting line in the second nonvolatile memory circuit;
leaving a circuit arrangement of the driver circuits of the first nonvolatile memory circuit substantially unchanged in such a manner that each driver circuit includes a switching MISFET which has a source-drain path coupled between the terminal and said selecting line in the second nonvolatile memory circuit;
and
fixing the terminal coupled to the source-drain path of the switching MISFET at the power source voltage in the second nonvolatile memory circuit.

3 more elements

Dependencies are inferred from the claim text.

Method of fabricating a second semiconductor integrated circuit device from a first semiconductor integrated circuit device

Life of this patent

Method of fabricating a second semiconductor integrated circuit device from a first semiconductor integrated circuit device

Life of this patent

Abstract

Claims17