US 5,182,469 A · Integrated circuit having bipolar transistors and field effect transistors respectively using potentials of opposite polarities relative to substrate

Abstract

An integrated circuit having a first group of semiconductor components which use potentials which are positive with respect to the substrate and a second group of components which use potentials which are negative with respect to the substrate. A negative voltage regulator circuit suitable for use in telephone circuits is described in which the regulated output is produced at the substrate so that noise can be prevented from being capacitatively coupled from the substrate to the input stages of amplifiers in the same integrated circuit. The exemplary circuit is produced by the so-called BIDFET process and use both bipolar and field effect transistors. One semiconductor component described includes an enhancement mode MOSFET with a channel in the surface of an epitaxial layer and a drain region forming the base of a bipolar transistor using the epitaxial layer as a collector region, there being a highly doped buried layer of the same conductivity type as the epitaxial layer at the interface between it and the substrate which is of the opposite conductivity type.

Claims12

Dependent claims

An integrated circuit comprising:

a semiconductor substrate;
a plurality of semiconductor circuit components on said semiconductor substrate;
said plurality of semiconductor circuit components including respective first and second groups of semiconductor circuit components interconnected in a single circuit;
said first group of semiconductor circuit components including at least one transistor having a plurality of electrodes and at all of whose electrodes appear potentials which are positive with respect to said substrate;
said second group of semiconductor circuit components including at least one transistor having a plurality of electrodes and at all of whose electrodes appear potentials which are negative with respect to said substrate;
and
means providing reverse-biased PN junctions electrically isolating at least some of said plurality of semiconductor circuit components included in said first and second groups of semiconductor circuit components from each other.

4 more elements

A integrated circuit comprising:

a semiconductor substrate of one conductivity type having a top surface;
an epitaxial layer of semiconductor material of the other conductivity type opposite to said one conductivity type disposed on the top surface of said semiconductor substrate;
a plurality of regions of said one conductivity type extending through said epitaxial layer of the other conductivity type from the top surface thereof to the top surface of said semiconductor substrate of said one conductivity type to define respective electrically isolating PN junctions for reverse biasing operation and dividing said epitaxial layer of the other conductivity type into a plurality of electrically isolated regions;
at least one first transistor formed in certain electrically isolated regions of said epitaxial layer;
well regions of said one conductivity type formed in other electrically isolated regions of said epitaxial layer and opening onto the top surface thereof;
field effect transistors formed in said well regions of said one conductivity type as provided in said other electrically isolated regions of said epitaxial layer;
said first transistors and said field effect transistors being interconnected in a single circuit;
each of said first transistors in said single circuit having a plurality of electrodes and at all of whose electrodes appear potentials of one polarity relative to said semiconductor substrate of said one conductivity type;
and
each of said field effect transistors in said single circuit having a plurality of electrodes and at all of whose electrodes appear potentials of the other polarity opposite to said one polarity with respect to said semiconductor substrate of said one conductivity type.

7 more elements

An integrated circuit comprising:

a semiconductor substrate of one conductivity type having a top surface;
an epitaxial layer of semiconductor material of the other conductivity type opposite to said one conductivity type disposed on the top surface of said semiconductor substrate;
a plurality of regions of said one conductivity type extending through said epitaxial layer of the other conductivity type from the top surface thereof to the top surface of said semiconductor substrate of said one conductivity type to define respective electrically isolating PN junctions for reverse biasing operation and dividing said epitaxial layer of the other conductivity type into a plurality of electrically isolated regions;
at least one first transistor formed in certain electrically isolated regions of said epitaxial layer;
well regions of said one conductivity type formed in other electrically isolated regions of said epitaxial layer and opening onto the top surface thereof;
field effect transistors formed in said well regions of said one conductivity type as provided in said other electrically isolated regions of said epitaxial layer;
said first transistors and said field effect transistors being interconnected in a single circuit;
each of said first transistors in said single circuit having a plurality of electrodes and at all of whose electrodes appear potentials of one polarity relative to said semiconductor substrate of said one conductivity type;
each of said field effect transistors in said single circuit having a plurality of electrodes and at all of whose electrodes appear potentials of the other polarity opposite to said one polarity with respect to said semiconductor substrate of said one conductivity type;
said single circuit having a circuit configuration including a MOSFET input component as one of said field effect transistors directly connected to a bipolar transistor output component as one of said first transistors;
both of said MOSFET input component and said bipolar transistor output component being defined in said epitaxial layer, said epitaxial layer forming the channel of said MOSFET and the collector of said bipolar transistor;
first and second dopant regions of said one conductivity type within said epitaxial layer and respectively serving as source and drain regions of said MOSFET, said dopant region of said one conductivity type acting as the drain of said MOSFET also serving as the base of said bipolar transistor;
said MOSFET input component comprising an enhancement mode MOSFET having an insulated gate overlying the surface of said channel formed in said epitaxial layer between the source and drain regions of said one conductivity type defined in the surface of said epitaxial layer;
said bipolar transistor output component having its base and emitter regions defined by the drain region of said MOSFET input component and a region of said other conductivity type within said drain regions respectively;
a buried layer of said other conductivity type at a high concentration located at the interface of said epitaxial layer and said semiconductor substrate;
and
an ohmic connection on the surface of said epitaxial layer as the collector contact for said bipolar transistor output component.

14 more elements

Dependencies are inferred from the claim text.

Integrated circuit having bipolar transistors and field effect transistors respectively using potentials of opposite polarities relative to substrate

Life of this patent

Integrated circuit having bipolar transistors and field effect transistors respectively using potentials of opposite polarities relative to substrate

Life of this patent

Abstract

Claims12