CMOS buffer circuit which is not influenced by bounce noise
AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsHiroshige Hirano, Tatsumi Sumi
Life of this patent
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Abstract
This invention relates to an input buffer circuit including a NOT circuit composed of N-channel MOS transistor (NMOST) and P-channel MOS transistor (PMOST). This adjusts the resistance value between the NMOST and grounding voltage VSS, or the resistance value between the PMOST and supply voltage VCC, or both resistance values so as to decrease the current flowing the supply voltage VCC to the grounding voltage VSS. According to the construction, the power consumption is suppressed, and floating of grounding voltage VSS and lowering of supply voltage VCC may be prevented, so that the switching level of the input signal will not be deviated from the target value.
Claims20
A CMOS buffer circuit for reducing bounce noise, comprising;
- a first circuit composed of MOS transistors;
- a first resistance connected between a transistor of a certain conductive type of the first circuit and a first potential source;
- and
- a second resistance connected between a transistor of a reverse conductive type of the first circuit and a second potential source, wherein the resistance value of the first resistance is defined as R1, the resistance value of the second resistance is defined as R2, and the resistances are related by one of the equations R1=.alpha.R2 and R1=R2/.alpha. where .alpha. is a constant.
A CMOS buffer circuit, comprising:
- a first circuit composed of MOS transistors;
- first resistor means connected between a transistor of a first conductivity type and a first potential source;
- second resistor means connected between a transistor of a first stage of the first circuit and the first potential source;
- and
- third resistor means connected between a transistor of a second conductivity type and a second potential source;
- wherein the current flowing in the first stage is smaller than the current flowing in the second circuit;
- and wherein said CMOS buffer circuit is not influenced by bounce noise.
A CMOS buffer circuit, comprising:
- a first circuit composed of MOS transistors;
- first resistor means, wherein one end thereof is connected to a transistor of a first conductivity type of the first circuit;
- second resistor means connected between the other end of the first resistor means and a first potential source;
- third resistor means, wherein one end thereof is connected to a transistor of a second conductivity type;
- and
- fourth resistor means connected between the other end of the third resistor means and a second potential source wherein the sum of the resistance value of the first resistor means and the resistance value of the second resistor means is a constant multiple of the sum of the resistance value of the third resistor means and the resistance value of the fourth resistor means;
- wherein said CMOS buffer circuit is not influenced by bounce noise.
A CMOS buffer circuit, comprising:
- a first circuit composed of MOS transistors;
- first resistor means connected between a transistor of a first conductivity type of a second circuit of the first circuit and a first potential source;
- second resistor means connected between a transistor of a second conductivity type and a second potential source;
- third resistor means, wherein one end thereof is connected to a transistor of a certain conductive type of a first stage of the first circuit;
- fourth resistor means connected between the other end of the third resistor means and the first potential source;
- fifth resistor means, wherein one end thereof is connected to a transistor of the reverse conductive type of the first stage of the first circuit;
- and
- sixth resistor means connected between the other end of the fifth resistor means and the second potential source, wherein the current flowing in the first stage is smaller than the current flowing in the second circuit;
- wherein said CMOS buffer circuit is not influenced by bounce noise.
Dependencies are inferred from the claim text.