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US 5,177,584 AGranted
Semiconductor integrated circuit device having bipolar memory, and method of manufacturing the same
AssigneeHitachi, Ltd.
InventorsAkihisa Uchida, Yuji Yatsuda, Katsumi Ogiue, Kazuo Nakazato, Takahiro Onai
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Abstract
A bipolar SRAM which includes a forward bipolar transistor and a reverse bipolar transistor on an identical semiconductor substrate, is disclosed. Concretely, the base region of the reverse bipolar transistor is formed at a deeper position of the substrate than the base region of the forward bipolar transistor, thereby to heighten the cutoff frequency f.sub.T of the reverse bipolar transistor.
Claims7
A semiconductor memory device, comprising:
- a semiconductor body having a main surface;
- and
- at least one memory cell formed at said main surface, said memory cell including a first bipolar transistor and a second bipolar transistor, a collector of said first bipolar transistor being coupled to a base of said second bipolar transistor, a collector of said second bipolar transistor being coupled to a base of said first bipolar transistors, and each of emitters of said first and second bipolar transistors being coupled to a complementary data line pair of said memory device.
- wherein each of said first and second bipolar transistors forms a cross-coupled switching transistor in said memory cell and is formed to operate in an inverse mode such that each of said first and second bipolar transistors includes:
- a buried layer formed within said semiconductor body to serve as an emitter region;
- a first semiconductor region formed to directly contact an upper surface of said buried layer to serve as a base region;
- and
- a second semiconductor region formed to have an upper surface at said main surface of said semiconductor body and a lower surface in contact with an upper surface of said first semiconductor region, wherein said second semiconductor region serves as a collector region,
- wherein said semiconductor body is comprised of a semiconductor substrate of a first conductivity type and an epitaxial layer of a second conductivity type, wherein said buried layer is formed between said epitaxial layer and said semiconductor substrate, and wherein said first and second semiconductor regions are formed within said epitaxial layer,
- wherein said buried layer has said second conductivity type, said first semiconductor region has said first conductivity type and said second semiconductor region has said second conductivity type, and
- wherein said buried layer has a higher impurity concentration than said first semiconductor region.
8 more elements
Dependencies are inferred from the claim text.