MOS semiconductor device with high dielectric constant sidewall insulator and induced source/drain extension

A MOS semiconductor device comprising:

• a semiconductor substrate having a first conductivity type;
• a first insulating film formed on a selected portion of the substrate;
• a gate electrode formed on the first insulating film;
• a first semiconductor region formed in a surface region of the substrate under the first insulating film, and containing an impurity of the first conductivity type;
• a pair of second insulating films formed in contact with a pair of side walls of the gate electrode and in contact with the substrate, and having a dielectric constant higher than that of the first insulating film;
• a pair of second semiconductor regions of the first conductivity type formed on that surface region of the substrate, which is in contact with the second insulating films, such that the second semiconductor regions sandwich the first semiconductor region, and each containing an impurity of the first conductivity type, the concentration of the impurity being lower than that in the first semiconductor region;
• and
• a pair of third semiconductor regions formed in the surface regions of the substrate such that the third semiconductor regions adjoin the second semiconductor regions, and each containing an impurity of a second conductivity type.