Resin-encapsulated semiconductor device package with nonconductive tape embedded between outer lead portions

A semiconductor device package comprising:

• a patterned lead frame of an electrically conductive material including a plurality of electrically conductive leads having inner lead portions and outer lead portions;
• a semiconductor chip mounted to said patterned lead frame in proximity to said inner lead portions;
• electrically conductive connector wires extending between said semiconductor chip and at least some of said inner lead portions and connecting said semiconductor chip to said at least some of said inner lead portions;
• a nonconductive photoresist material locally embedding predetermined areas of the adjacent outer lead portions and filling the spaces therebetween, said nonconductive photoresist material including relatively thin photoresist layers disposed on upper and lower surfaces of the locally embedded predetermined areas of the adjacent outer lead portions and integral with the locally embedded nonconductive photoresist material filling the spaces between the adjacent outer lead portions;
• each of said outer lead portions having a terminal end extending outwardly from the predetermined area thereof as locally embedded by said nonconductive photoresist material;
• a molded mass of nonconductive material encapsulating said semiconductor chip, said connector wires and portions of said plurality of electrically conductive leads other than said outer lead portions;
• and
• said locally embedding nonconductive photoresist material embedded in the spaces between adjacent outer lead portions blocking the outflow of the encapsulating molded mass of nonconductive material along the spaces between adjacent outer lead portions to ensure hermetic sealing by the molded mass of nonconductive material with respect to the semiconductor chip, said connector wires, and the plurality of electrically conductive leads of said lead frame with the terminal ends of said outer lead portions extending outwardly thereof.

A semiconductor device package comprising:

• a patterend lead frame of an electrically conductive material including a plurality of electrically conductive leads having inner lead portions and outer lead portions;
• a semiconductor chip mounted to said patterned lead frame in proximity to said inner lead portions;
• electrically conductive connector wires extending between said semiconductor chip and at least some of said inner lead portions and connecting said semiconductor chip to said at least some of said inner lead portions;
• a nonconductive prepreg material locally embedding predetermined areas of the adjacent outer lead portions and filling the spaces therebetween;
• each of said outer lead portions being provided with notches in the surfaces thereof located at said predetermined areas thereon, said nonconductive prepreg material being embedded in the notches formed in said predetermined areas of said outer lead portions;
• each of said outer lead portions having a terminal end extending outwardly from the predetermined area thereof as locally embedded by said nonconductive prepreg material;
• a molded mass of nonconductive material encapsulating said semiconductor chip, said connector wires and portions of said plurality of electrically conductive leads other than said outer lead portions;
• and
• said locally embedding nonconductive prepreg material embedded in the spaces between adjacent outer lead portions blocking the outflow of the encapsulating molded mass of nonconductive material along the spaces between adjacent outer lead portions to ensure hermetic sealing by the molded mass of nonconductive material with respect to the semiconductor chip, said connector wires, and the plurality of electrically conductive leads of said lead frame with the terminal ends of said outer lead portions extending outwardly thereof.