Bootstrapped FET sampling switch

An analog-to-digital converter comprising in combination:

• (a) a bootstrapped analog MOSFET sampling switch circuit including
• (1) sampling MOSFET having a drain electrode coupled by a sampling capacitor to an output conductor;
• (2) a divider circuit coupling an analog input signal to a source electrode of the sampling MOSFET;
• (3) a first operational amplifier having a non-inverting input coupled to the source electrode of the sampling MOSFET and an inverting input coupled to an output of the first operational amplifier and a body electrode of the sampling MOSFET;
• (4) a second operational amplifier having an output coupled to a gate electrode of the sampling MOSFET and a non-inverting input coupled to the source electrode of the sampling MOSFET;
• (5) a first MOSFET having a gate electrode coupled to the gate electrode of the sampling MOSFET, a drain electrode coupled to receive a positive supply voltage and a source electrode coupled to an inverting input of the second operational amplifier;
• (6) a second MOSFET having a drain electrode coupled to the source electrode of the first MOSFET;
• (7) a first resistor coupled between a source electrode of the second MOSFET and a ground voltage conductor;
• (8) a third operational amplifier having an output coupled to a gate electrode of the second MOSFET, a non-inverting input coupled to a bias voltage source, and an inverting input coupled to the source electrode of the second MOSFET, whereby a constant current flows through the first MOSFET, maintaining constant its gate-to-source voltage, and thereby maintaining constant the gate-to-source voltage of the sampling MOSFET despite large variations in the analog input signal;
• (b) a sampling capacitor having one terminal coupled to the drain electrode of the sampling MOSFET;
• (c) a switched capacitor array coupled to another terminal of the sampling capacitor;
• (d) comparator means for comparing a voltage on a junction between the sampling capacitor and the switch capacitor array with a predetermined threshold voltage;
• (e) a successive approximation register means responsive to the comparator for switching the switched capacitor array and storing a digital successive approximation of a value corresponding to the analog input signal.

A method of sampling an analog input signal that has a signal range above and below a ground reference voltage, the method comprising the steps of:

• (a) scaling the analog input signal down to a lower magnitude such that all values of the scaled analog input signal are above the ground reference voltage;
• (b) applying the scaled down analog input signal to a source electrode of a sampling MOSFET;
• (c) maintaining a body-to-source voltage of the sampling MOSFET at approximately zero volts by applying the scaled down analog input signal to a non-inverting input of a first operational amplifier and applying an output voltage produced by the first operational amplifier to its inverting input and a body electrode of the sampling MOSFET;
• (d) maintaining a gate-to-source voltage of the sampling MOSFET at a constant value independent of analog input signal variation by
• i. applying the scaled down analog input signal to a non-inverting input of a second operational amplifier,
• ii. applying an output of the second operational amplifier to a gate electrode of the sampling MOSFET and to a gate electrode of a first MOSFET, and
• iii. causing a constant current to flow through the first MOSFET and applying a resulting voltage on the source electrode of the first MOSFET to an inverting input of the second operational amplifier.

A circuit for sampling an analog input signal that has a signal range above and below a ground reference voltage, the circuit comprising in combination:

• (a) means for scaling the analog input signal down to a lower magnitude such that all values of the scaled analog input signal are above the ground reference voltage;
• (b) means for applying the scaled down analog input signal to a source electrode of a sampling MOSFET;
• (c) means for maintaining a body-to-source voltage of the sampling MOSFET at approximately zero volts by applying the scaled down signal to a non-inverting input of a first operational amplifier;
• (d) means for applying an output voltage produced by the first operational amplifier to its inverting input and a body electrode of the sampling MOSFET;
• (e) means for maintaining a gate-to-source voltage of the sampling MOSFET at a constant value independent of analog input signal variation, including
• i. first means for applying the scaled down analog input signal to a non-inverting input of a second operational amplifier,
• ii. second means for applying an output of the second operational amplifier to a gate electrode of the sampling MOSFET and to a gate electrode of a first MOSFET having a drain coupled to a positive supply voltage, and
• iii. third means coupled to the source of the first MOSFET for causing a constant current to flow through the first MOSFET and applying a resulting voltage on the source of the first MOSFET to an inverting input of the second operational amplifier.

An integrated circuit bootstrapped analog MOSFET sampling switch circuit, comprising in combination:

• (a) a sampling MOSFET having a drain electrode coupled to an output conductor, a source electrode coupled to receive an analog input voltage, a gate electrode, and a body electrode;
• (b) first means coupled between the body and source electrodes for maintaining a constant voltage relationship between the body electrode and the source electrode;
• (c) second means comprising a first MOSFET coupled between the gate electrode and the source electrode for maintaining a constant gate-to-source voltage across the sampling MOSFET in response to a constant current flowing through the first MOSFET of the second means;
• and
• (d) means coupled to the second means for forcing the constant current through the first MOSFET of the second means substantially independently of the analog input voltage.

A method of sampling an analog input signal that has a signal range above and below a ground reference voltage, the method comprising the steps of:

• (a) applying the analog input signal to a source electrode of a sampling MOSFET;
• (c) maintaining a body-to-source voltage of the sampling MOSFET at approximately zero volts by applying the scaled down analog input signal to a non-inverting input of a first operational amplifier and applying an output voltage produced by the first operational amplifier to its inverting input and a body electrode of the sampling MOSFET;
• (d) maintaining a gate-to-source voltage of the sampling MOSFET at a constant value independent of analog input signal variation by
• i. applying the analog input signal to a non-inverting input of a second operational amplifier,
• ii. applying an output of the second operational amplifier to a gate electrode of the sampling MOSFET and to a gate electrode of a first MOSFET, and
• iii. causing a constant current to flow through the first MOSFET and applying a resulting voltage on the source electrode of the first MOSFET to an inverting input of the second operational amplifier.