Digital signal processor for selectively performing cordic, division or square-rooting procedures

A digital processor for selectively performing successive steps of COordinate Rotation Digital Computer (CORDIC), non-restoring division or non-restoring square-rooting procedures, which steps are consecutively ordinally numbered beginning with zeroeth in accordance with an index i that is augmented by one each succeeding step of one of said procedures, said digital processor is a bit-serial processor in which each procedure step is performed during two successive bit-serial word intervals. said digital processor comprising:

• a first accumulator for temporarily storing successive first digital accumulation result, said first accumulator provided with a respective signal input port and arranged for receiving via its respective signal input port for temporary storage therewithin as a first digital accumulation result a first component vector during the initial step of said CORDIC procedure, for receiving for temporary storage as an updated first digital accumulation result a remnant first cross sum during the latter of said two successive bit-serial word intervals in each further step of said CORDIC procedure, for receiving via its respective signal input port for temporary storage therewithin as a first digital accumulation result a dividend input signal during the initial step of said division procedure, for receiving for temporary storage as an updated first digital accumulation result a remnant dividend during the latter of said two successive bit-serial word intervals in each further step of said non-restoring division procedure, for receiving via its respective signal input port for temporary storage therewithin as a first digital accumulation result a radicand input signal during the initial step of said non-restoring square-rooting procedure, and for receiving for temporary storage as an updated first digital accumulation result a remnant radicand during the latter of said two successive bit-serial word intervals in each further step of said non-restoring square-rooting procedure;
• a second accumulator for temporarily storing successive second digital accumulation results, said second accumulator provided with a respective signal input port and a respective output port, said second accumulator arranged for receiving via its respective signal input port for temporary storage therewithin as a second digital accumulation result a second component vector during the initial step of said CORDIC procedure, for receiving for temporary storage as an updated second digital accumulation result a remnant second cross sum during the latter of said two successive bit-serial word intervals in each further step of said CORDIC procedure, for receiving via its respective signal input port for temporary storage therewithin as a second digital accumulation result a divisor input signal during the initial step of said non-restoring division procedure, and for receiving for temporary storage as an updated second digital accumulation result during the latter of said two successive bit-serial word intervals in each further step of said non-restoring division procedure a signal corresponding to the absolute value of said divisor input signal;
• a third accumulator for temporarily storing successive third digital accumulation results, said third accumulator provided with a respective signal input port and a respective output port, said third accumulator arranged for temporarily storing arithmetic zero therewithin as a third digital accumulation result during the zeroeth step of any of said procedures, for temporarily storing during each successive step of said CORDIC procedure a respective successive approximation of an arc tangent angle as updated the latter of said two successive bit-serial word intervals in that successive step, for temporarily storing a respective successive approximation of a quotient during each successive step of said non-restoring division procedure as updated the latter of said two successive bit-serial word intervals in that successive step, and for temporarily storing a respective successive approximation of a square root during each successive step of said non-restoring square-rooting procedure as updated the latter of said two successive bit-serial word intervals in that successive step;
• means for generating an arc tangent radix as determined in accordance with i during each step of said CORDIC procedure;
• means for comparing each successive said first accumulation result to zero during the earlier of said two successive bit-serial word intervals in each step of said CORDIC procedure and of said non-restoring division procedure, before said first accumulation result is updated during that step;
• means for comparing each successive said first accumulation result to said trial approximation to said remnant radicand during the earlier of said two successive bit-serial word intervals in each step of said non-restoring square-rooting procedure, before said first accumulation result is updated during that step;
• means for responding, during each step of said CORDIC procedure, to each successive said first digital accumulation result before it is updated being at least zero, to condition said first accumulator to increment its first digital accumulation result with the current second accumulation result and then double the resulting sum to generate an updated first digital accumulation result;
• means for responding, during each step of said CORDIC procedure, to each successive said first digital accumulation result before it is updated being at least zero, to condition said second accumulator to increment its second digital accumulation result with the product of the current first digital accumulation result as multiplied by 2.sup.-(i+1), thereby to generate an updated second digital accumulation result;
• means for responding, during each step of said CORDIC procedure, to each successive said first digital accumulation result before it is updated being at least zero, to condition said third accumulator to increment its third digital accumulation result with said arc tangent radix as determined in accordance with i, thereby to generate an updated third digital accumulation result;
• means for responding, during each step of said CORDIC procedure, to each successive said first digital accumulation result before it is updated being less than zero, to condition said first accumulator to decrement its first digital accumulation result with the second accumulation result before an updating thereof and then double the resulting sum to generate an updated first digital accumulation result;
• means for responding, during each step of said CORDIC procedure, to each successive said first digital accumulation result before it is updated being less than zero, to condition said second accumulator to decrement its second digital accumulation result with the product of the current first digital accumulation result as multiplied by 2.sup.-(i+1), thereby to generate an updated second digital accumulation result;
• means for responding, during each step of said CORDIC procedure, to each successive said first digital accumulation result before it is updated being less than zero, to condition said third accumulator to decrement its third digital accumulation result with said arc tangent radix as determined in accordance with i, thereby to generate an updated third digital accumulation result;
• means for responding, during each step of said non-restoring division procedure, to each successive first digital accumulation result before it is updated being at least zero, to condition said first accumulator to decrement its first digital accumulation result with one-half said second digital accumulation result, thereby to generate an updated first digital accumulation result;
• means for responding, during each step of said non-restoring division procedure, to each succesive first digital accumulation result before it is updated being at least zero, to condition said third accumulator to increment its third digital accumulation result with 2.sup.-(i+1), thereby to generate an updated third digital accumulation result;
• means for responding, during each step of said non-restoring division procedure, to each successive first digital accumulation result before it is updated being less than zero, to condition said first accumulator to increment its first digital accumulation result with one-half said second digital accumulation result, thereby to generate an updated first digital accumulation result;
• means for responding, during each step of said non-restoring division procedure, to each successive first digital accumulation result before it is updated being less than zero, to condition said third accumulator to decrement its third digital accumulation result with 2.sup.-(i+1), thereby to generate an updated third digital accumulation result;
• means for responding, during each step of said non-restoring square-rooting procedure, to each successive first digital accumulation result before it is updated being at least as large as a trial approximation to said remnant radicand, to condition said first accumulator to decrement its first digital accumulation result with twice the sum of 2.sup.-(i+2) and said third accumulation result before it is updated, thereby to generate an updated first digital accumulation result;
• means for responding, during each step of said non-restoring square-rooting procedure, to each successive first digital accumulation result before it is updated being less than said trial approximation to said remnant radicand, to condition said first accumulator to increment its first digital accumulation result with twice the sum of 2-.sup.(i+2) and third accumulation result before it is updated, thereby to generate an updated first digital accumulation result;
• and
• means for responding, during each step of said non-restoring square-rooting procedure, to each successive first digital accumulation result before it is updated being at least as large as a trial approximation to said remnant radicand, to condition said third accumulator to increment its third digital accumulation result with 2.sup.-(i+1), thereby to generate an updated third digital accumulation result,
• wherein said comparing of each successive said first accumulation result taking place during the earlier of said two successive bit-serial word intervals in each said procedure step, and with said updatings of said first and second and third accumulation results taking place during the latter of said two successive bit-serial word intervals in said procedure steps after the zeroeth.

A digital processor for selectively performing successive steps of COordinate Rotation Digital Computation (CORDIC), non-restoring division or non-restoring square-rooting procedures, which steps are consecutively ordinally numbered beginning with zeroeth in accordance with an index i that is augmented by one each succeeding step of one of said procedures, said processor comprising:

• a first accumulator for temporarily storing successive first digital accumulation results, said first accumulator provided with a respective signal input port and arranged for receiving via its respective signal input port for temporary storage therewithin as a first digital accumulation result a first component vector during the initial step of CORDIC procedure, for receiving for temporary storage as an updated first digital accumulation result a remmant first cross sum during each further step of said CORDIC procedure, for receiving via its respective signal input port for temporary storage therewithin as a first digital accumulation result a dividend input signal during the initial step of said division procedure, for receiving for temporary storage as an updated first digital accumulation result a remnant dividend during each further step of said non-restoring division procedure, for receiving via its respective signal input port for temporary storage therewithin as a first digital accumulation result a radicand input signal during the initial step of said non-restoring square-rooting procedure, and for receiving for temporary storage as an updated first digital accumulation result a remnant radicand during each further step of said non-restoring square-rooting procedure;
• a second accumulator for temporarily storing successive second digital accumulation results, said second accumulator provided with a respective signal input port and a respective output port, said second accumulator arranged for receiving via its respective signal input port for temporary storage therewithin as a second digital accumulation result a second component vector during the initial step of said CORDIC procedure, for receiving for temporary storage as an updated second digital accumulation result a remnant second cross sum during each further step of said CORDIC procedure, for receiving via its respective signal input port for temporary storage therewithin as a second digital accumulation result a divisor input signal during the initial step of said non-restoring division procedure, and for receiving for temporary storage as an updated second digital accumulation result during each further step of said non-restoring division procedure a signal corresponding to the absolute value of said divisor input signal;
• a third accumulator for temporarily storing successive third digital accumulation results, said third accumulator provided with a respective signal input port and a respective output port, said third accumulator arranged for temporarily storing arithmetic zero therewithin as a third digital accumulation result during the zeroeth step of any of said procedures, for temporarily storing during each successive step of said CORDIC procedure a respective successive approximation of an arc tangent angle, for temporarily storing a respective successive approximation of a quotient during each successive step of said non-restoring division procedure, and for temporarily storing a respective successive approximation of a square root during each successive step of said non-restoring square-rooting procedure;
• means for generating an arc tangent radix as determined in accordance with i during each step of said CORDIC procedure;
• means for comparing each successive said first accumulation result to zero during each step of said CORDIC procedure and of said non-restoring division procedure, before said first accumulation result is updated during that step;
• means for comparing each successive said first accumulation result to said trial approximation to said remnant radicand during each step of said non-restoring square-rooting procedure, before said first accumulation result is updated during that step;
• means for responding, during each step of said CORDIC procedure, to each successive said first digital accumulation result before it is updated being at least zero, to condition said first accumulator to increment its first digital accumulation result with the current second accumulation result and then double the resulting sum to generate an updated first digital accumulation result;
• means for responding, during each step of said CORDIC procedure, to each successive said first digital accumulation result before it is updated being at least zero, to condition said second accumulator to increment its second digital accumulation result with the product of the current first digital accumulation result as multiplied by 2.sup.-(i+1), thereby to generate an updated second digital accumulation result;
• means for responding, during each step of said CORDIC procedure, to each successive said first digital accumulation result before it is updated being at least zero, to condition said third accumulator to increment its third digital accumulation result with said arc tangent radix as determined in accordance with i, thereby to generate an updated third digital accumulation result;
• means for responding, during each step of said CORDIC procedure, to each successive said first digital accumulation result before it is updated being less than zero, to condition said first accumulator to decrement its first digital accumulation result with the second accumulation result before an updating thereof and then double the resulting sum to generate an updated first digital accumulation result;
• means for responding, during each step of said CORDIC procedure, to each successive said first digital accumulation result before it is updated being less than zero, to condition said second accumulator to decrement its second digital accumulation result with the product of the current first digital accumulation result as multiplied by 2.sup.-(i+1), thereby to generate an updated second digital accumulation result;
• means for responding, during each step of said CORDIC procedure, to each successive said first digital accumulation result before it is updated being less than zero, to condition said third accumulator to decrement its third digital accumulation result with said arc tangent radix as determined in accordance with i, thereby to generate an updated third digital accumulation result;
• means for responding, during each step of said non-restoring division procedure that the amplitude of said first accumulation result is smaller than the amplitude of said second accumulation result, to each successive first digital accumulation result before it is updated being at least zero, to condition said first accumulator to decrement its first digital accumulation result with one-half said second digital accumulation result, thereby to generate an updated first digital accumulation result;
• means for responding, during each step of said non-restoring division procedure, to each successive first digital accumulation result before it is updated being at least zero, to condition said third accumulator to increment its third digital accumulation result with 2.sup.-(i+1), thereby to generate an updated third digital accumulation result;
• means for responding, during each step of said non-restoring division procedure that the amplitude of said first accumulation result is smaller than the amplitude of said second accumulation result, to each successive first digital accumulation result before it is updated being less than zero, to condition said first accumulator to increment its first digital accumulation result with one-half said second digital accumulation result, thereby to generate an updated first digital accumulation result;
• means for responding, during each step of said non-restoring division procedure, to each successive first digital accumulation result before it is updated being less than zero, to condition said third accumulator to decrement its third digital accumulation result with 2.sup.-(i+1), thereby to generate an updated third digital accumulation result;
• means for responding, during each step of said non-restoring square-rooting procedure, to each successive first digital accumulation result before it is updated being at least as large as a trial approximation to said remnant radicand, to condition said first accumulator to decrement its first digital accumulation result with twice the sum of 2.sup.-(i+2) and said third accumulation result before it is updated, thereby to generate an updated first digital accumulation result;
• means for responding, during each step of said non-restoring square-rooting procedure, to each successive first digital accumulation result before it is updated being less than said trial approximation to said remnant radicand, to condition said first accumulator to increment its first digital accumulation result with twice the sum of 2.sup.-(i+2) and said third accumulation result before it is updated, thereby to generate an updated first digital accumulation result;
• and
• means for responding, during each step of said non-restoring division procedure or said non-restoring square-rooting procedure, to each successive first digital accumulation result before it is updated being at least as large as a trial approximation to said remnant radicand, to condition said third accumulator to increment its third digital accumulation result with 2.sup.-(i+1), thereby to generate an updated third digital accumulation result, which said digital processor is a bit-serial processor in which each procedure step is performed during two successive bit-serial word intervals, with said comparing of each successive said first accumulation result taking place during the earlier of said two successive bit-serial word intervals in each said procedure step, and with said updatings of said first and second and third accumulation results taking place during the latter of said two successive bit-serial word intervals in said procedure steps after the zeroeth.