Apparatus for minimizing the reverse bias breakdown of emitter base junction of an output transistor in a tristate bicmos driver circuit
AssigneeSun Microsystems, Inc.
InventorAchyutram Bhamidipaty
Life of this patent
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Abstract
A tristate driver circuit including a first output transistor for furnishing a first output voltage at an output terminal in the on condition, the first transistor being susceptible to disablement or degraded operation from back biasing in the presence of voltages above a particular level at the output terminal in the off condition, a second output transistor for furnishing a second output voltage at the output terminal in the on condition, apparatus for biasing the first and second transistors to allow operation thereof in the presence of enable signals and to disable operation in the absence of enable signals, and apparatus for eliminating back biasing of the first transistor in the absence of enable signals.
Claims6
A tristate driver circuit comprising a first output transistor for furnishing a first output voltage at an output terminal in the on condition, the first transistor being susceptible to disablement or degraded operation from back biasing in the presence of voltages above a particular level at the output terminal in the off condition, a second output transistor for furnishing a second output voltage at the output terminal in the on condition, means for biasing the first and second transistors to allow operation thereof in the presence of enable signals and to disable operation in the absence of enable signals, and means for eliminating back biasing of the first transistor in the absence of enable signals.
Dependencies are inferred from the claim text.