Heterojunction avalanche transistor

Abstract

An avalanche transistor has a heterojunction emitter-base junction. The avalanche transistor includes a spacer layer provided between an emitter layer and a base layer. The spacer layer has an energy band gap between that of the base layer and that of the emitter layer, a carrier concentration lower than that of the base layer, and a thickness so that the whole spacer layer becomes a depletion layer at thermal equillibrium so that a neutral region is produced in the spacer layer at a voltage lower than the threshold voltage of the emitter-base junction. Thus, the same element is both bistable with the base current as a parameter and has an S-shaped negative differential resistance with the base voltage as a parameter.

Dependencies are inferred from the claim text.