Input/output circuit with programmable input sensing time
AssigneeMotorola, Inc.
InventorsAntone L. Fourcroy, Mark W. McDermott, James C. Smallwood
Life of this patent
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Abstract
An input/output circuit of an integrated circuit with a programmable input sensing time. The output driver of the input/output circuit is open drain and is designed for use in a wire-OR configuration with other devices. The input/output circuit is coupled to a bonding pad and through the bonding pad to a device pin, and counts a programmable number of clock cycles between a negation of an output drive signal and when the state of the pin is sampled as an input. Since different applications use a wide range of values for external pullup resistors, the input/output circuit allows adjustment of the sample time to fit a particular application.
Claims10
An input/output circuit of an integrated circuit comprising:
- an open drain output driver responsive to an output drive signal;
- counter means, for receiving said output drive signal and a clock signal, and for counting a number of cycles of said clock signal in response to a negation of said output drive signal;
- register means, for storing a predetermined value, said predetermined value equal to a number of clock cycles between said negation of said output drive signal and when a logic state at said open drain output driver is to be sampled;
- comparator means, coupled to said counter means and to said register means, for comparing said number of clock cycles after said negation of said output drive signal to said predetermined value;
- and
- logic means, coupled to said comparator means and to said open drain output driver, for providing an input signal corresponding to said logic state when said number of clock cycles equals said predetermined value.
An input/output circuit of an integrated circuit comprising:
- a bonding pad, for providing an output signal out of the integrated circuit;
- an output driver, coupled to said bonding pad, for coupling said bonding pad to a power supply voltage terminal in response to an output drive signal;
- counter means, for receiving said output drive signal and a clock signal, and for counting a number of cycles of said clock signal after negation of said output drive signal;
- register means, for storing a predetermined value, said predetermined value equal to a number of clock cycles between said negation of said output drive signal and when a logic state on said bonding pad is to be sampled;
- comparator means, coupled to said counter means and to said register means, for comparing said number of clock cycles after said negation of said clock signal to said predetermined value;
- and
- logic means, coupled to said comparator means and to said bonding pad, for providing an input signal corresponding to a logic state on said bonding pad when said number of clock cycles equals said predetermined value.
A method for sampling a logic state of an input/output signal on a bonding pad of an integrated circuit after a negation of the signal by an open drain output driver of the integrated circuit, comprising the steps of:
- counting a time the negation of the open drain output driver;
- comparing said time with a predetermined value;
- and sampling the logic state on the bonding pad when said time reaches said predetermined value.
Dependencies are inferred from the claim text.