Dram with a vertical capacitor and transistor

A memory array formed in a semiconductor substrate having a first conductivity type and a first doping concentration, comprising:

• a plurality of conductive bit lines;
• a plurality of pillars of monocrystalline semiconductor material extending from the substrate, each having a first layer reaching a first height and which is the first conductivity type and of a second doping concentration which is less than the first doping concentration, a second layer above the first layer reaching a second height and which is a second conductivity type, a third layer above the second layer reaching a third height and which is the first conductivity type, and a fourth layer above the third layer reaching a fourth height and in contact with a corresponding one of the plurality of conductive bit lines;
• a plurality of first insulating films, each first insulating film surrounding a corresponding one of the plurality of pillars from the substrate to a fourth height, said fourth height being less than said first height;
• a conductive fill insulated from and surrounding the plurality of pillars to a fifth height which is below the second height;
• an insulating layer above the conductive fill and surrounding the plurality of pillars to a sixth height which is below the second height;
• a plurality of second insulating films, each second insulating film surrounding a corresponding pillar from the fifth height to a seventh height which is above the third height but below the fourth height;
• and
• a plurality of conductive word lines insulated from and at least partially surrounding the third layers of corresponding pillars of the plurality of pillars to the seventh height.

A memory cell formed on a semiconductor substrate, comprising:

• a pillar of monocrystalline semiconductor material extending from the substrate having a first layer reaching a first height and which is the first conductivity type and of a second doping concentration which is less than the first doping concentration, a second layer above the first layer reaching a second height and which is a second conductivity type, a third layer above the second layer reaching a third height and which is the first conductivity type, and a fourth layer above the third layer reaching a fourth height;
• an insulating film surrounding the pillar from the substrate to a fifth height, said fifth height being less than said second height;
• a conductive fill surrounding the pillar to a sixth height which is below the fifth height;
• an insulating layer above the conductive fill and surrounding the pillar to the fifth height;
• a second insulating film surrounding the pillar from the fifth height to a seventh height which is above the third height but below the fourth height;
• and
• a conductive word line at least partially surrounding the third layer of the pillar to an eighth height which is greater than the third height but less than the seventh height.