Conductance-modulated integrated transistor structure

An integrated CMOS transistor structure comprising a semiconductor body having a major surface with a first device region of a first conductivity type and a second device region of a second conductivity type therein,

• a first device formed in said first device region and including a source region and a drain region of said second conductivity type, said source and drain regions being spaced apart by a channel region and each of said source and drain regions forming a p-n junction with said first device region, a gate contact between said source and drain regions and insulatively spaced from said device region, an ohmic contact solely to said source region and a Schottky contact solely to said drain region, said Schottky contact forming a Schottky diode with said drain region which is forward biased and injecting minority carriers into said channel region when said gate contact is voltage biased on.
• a second device formed in said second device region and including a source region and a drain region of first conductivity type, said source and drain regions being spaced apart by a channel region and each of said source and said drain regions forming a p-n junction with said second device region, a gate contact between said source and drain regions and insulatively spaced from said second device region, an ohmic contact solely to said source region and a Schottky contact solely to said drain region, said Schottky contact forming a Schottky diode with said drain region which is forward biased and injecting minority carriers into said channel region when said gate contact is voltage biased on.
• input connector means interconnecting said gate contacts of said first and second devices, and
• output connector means interconnecting said Schottky contacts of said first and second devices.