Wiring method for semiconductor integrated circuit
AssigneeKabushiki Kaisha Toshiba
InventorTamotsu Hiwatashi
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AssigneeKabushiki Kaisha Toshiba
InventorTamotsu Hiwatashi
Estimating the term…
There is disclosed a computer-aided automatic wiring method for a semi-custom logic LSI having input/output circuit blocks arranged in the peripheral portion of a chip substrate and function blocks arranged in a substrate surface region surrounded by the input/output circuit blocks and selected to provide a desired logic function. Channels functioning as wiring regions are defined around the function blocks to include internal channels positioned between the function blocks and peripheral channels arranged in direct contact with the input/output circuit blocks. The internal channels are sequentially subjected to the wiring process according to the limitation of a predetermined processing order. After the wiring process for the internal channels is completed, the peripheral channels are merged to form a square ring-form channel region. Then, the square ring-form channel region is unidimensionally developed to form a belt-like channel region. The wiring process for the belt-like channel region is effected, and a wiring pattern resultantly obtained for the belt-like channel region is reformed to be suited to the square ring-form channel region, thus completing the wiring pattern for the peripheral channels.
An automatic wiring method for a semiconductor integrated circuit device in which function blocks selected to provide desired logic functions are arranged in the surface area of a substrate surrounded by input/output circuit blocks provided on the peripheral portion of said substrate and divided channels functioning as wiring regions are formed around said function blocks, said method comprising the steps of:
A computer-aided automatic wiring method for a semi-custom semiconductor integrated circuit device, comprising the steps of:
Dependencies are inferred from the claim text.