A method of forming a multilayered metal network for interconnecting components of a high-density integrated circuit, comprising forming on a substrate a lower metal layer comprising conductors having steep edges;
- applying a dielectric directly over said lower metal layer so that the conductors are covered by areas of the dielectric layer;
- applying a layer of a mineral spin-on-glass directly over said dielectric layer so as to form a thin film covering of spin-on-glass over said areas;
- controlling a reactive plasma for etching portions of said thin film of said spin-on-glass layer and the areas of said dielectric layer underlying the spin-on-glass layer to form flared vias which expose portions of the conductors of said lower metal layer;
- and applying an upper metal layer directly onto said spin-on-glass layer so as to cover said spin-on-glass layer and fill said vias.