Integrated circuit having mode selection
AssigneeTexas Instruments Incorporated
InventorRichard Simpson
Life of this patent
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Abstract
The mode of operation of an intergrated circuit capable of several modes of operation is determined by at least one signal applied to one or more mode selection terminal pins. The signal applied is a selected one of at least two signals derived from a clock signal used by the integrated circuit in its operation. The clock signal is generated by an oscillator which may be included in the integrated circuit or external to it; in either case, the clock signal appears at another terminal pin of the integrated circuit.
Claims8
An integrated circuit having at least two different modes of operation selected by a mode selection circuit in response to one or more inputs applied to one or more mode selection terminal pins, respectively, and one or more other terminal pins for one or more clock signals from a clock means, respectively, wherein at least one mode selection terminal pin is connected to a synchronous decoding circuit responsive to a clock signal related to that applied to the other terminal pin or one of the other terminal pins by the clock means and capable of producing a particular output only when another signal related to the clock signal applied to the said other terminal pin by the clock means is applied to the mode selection terminal pins, the mode selection circuit being responsive to the particular output of the synchronous decoding circuit.
A circuit arrangement including an integrated circuit having at least two different modes of operation selected by a mode selection circuit in response to one or more inputs applied to one or more mode selection terminal pins respectively and one or more other terminal pins for receiving respective clock signals, clock means connected to apply clock signals to the one or more other terminal pins, and mode selecting means connected to the one or more mode selection terminal pins, wherein, in the integrated circuit, at least one mode selection terminal pin is connected to a synchronous decoding circuit responsive to the input or inputs received via the at least one mode selection terminal pin using as a reference at least one clock signal derived from those applied to the one or more other terminal pins, the mode selection circuit being responsive to one or more outputs from the synchronous decoding circuit, and the mode selecting means is capable of applying to the at least one mode selection terminal pin a clock signal derived from the clock means so as to cause the mode selection circuit to select a particular mode of operation of the integrated circuit.
Dependencies are inferred from the claim text.