Fabrication of interlayer conductive paths in integrated circuits
AssigneeMassachusetts Institute of Technology
InventorsTerry O. Herndon, Glenn H. Chapman
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Abstract
A method of producing interlayer conductive paths having substantially planar top surfaces in a multilayer integrated circuit structure, comprising the steps of forming elements of either a conductive or semiconductive material as a lower layer, depositing an insulative layer on top of the lower layer elements, implanting ions into one or more selected regions of the insulative layer, forming at least one upper conductor over the selected regions and sintering the integrated circuit structure sufficient to render the selected regions conductive. The invention also embraces an integrated circuit structures with interlayer conductive paths made in accordance with this method.
Claims23
A method for producing interlayer conductive paths in an integrated circuit structure, the method comprising the steps of:
- depositing an insulative layer upon a lower element of an integrated circuit structure;
- implanting ions into at least one selected region of the insulative layer to form a modified region possessing a diffusion pathway for alloying with a conductive material;
- depositing an upper layer of conductive material over the selected region of the insulative layer;
- and
- sintering the deposited layers and integrated circuit structure to diffuse material from the upper conductive layer into said selected region of the insulative layer, thereby forming a conductive path in the selected region between the upper conductive layer and the lower element.
A method of producing an interlayer conductive path in a multilayer integrated circuit, the method comprising the steps of forming a first layer and a second, generally insulative, layer thereon;
- implanting silicon atoms into at least one selected region of the insulative layer to form a modified region possessing a diffusion pathway for alloying with a conductive material;
- forming a third layer on at least a portion of the insulative layer overlying the selected region, wherein one of said first or third layers is made of a conductive material;
- sintering the first, second and third layers at a temperature sufficient to convert the selected implanted region into a generally conductive composite material;
- and thereby selectively forming a generally conductive path through the second layer, said path vertically interconnecting the first and third layers.
A method of for producing a via for interconnecting multilevel integrated circuit conductors, the method comprising the steps of:
- plasma depositing an interlayer material essentially consisting of a generally insulative, silicon compound directly on a lower layer essentially consisting of a generally conductive aluminum alloy;
- implanting silicon atoms into the interlayer material through a mask having at least one opening at a selected via site to form a modified region possessing a diffusion pathway for alloying with a conductive material;
- depositing an upper layer essentially consisting of an aluminum alloy directly over said implanted via site;
- and
- diffusing aluminum from said upper and lower layers into the implanted via site of the interlayer material, and thereby producing a low resistance interconnection between the upper and lower layers.
Dependencies are inferred from the claim text.