Driver circuit providing load and time adaptive current

Abstract

A CMOS inverter driver circuit for powering an integrated circuit output pad or the like, capable of adapting by feedback detection to varying capacitive load conditions, and providing incrementally delayed current increases to avoid power supply and ground path spikes. In one configuration, a CMOS inventer is connected to an output pad, which output pad is further common to one or more pairs of complementary supplemental driver transistor stages. The supplemental driver stages are enabled by OR and AND local blocks responsive to the combinations of the input signal level and the output pad signal level. The supplemental driver stages are thereby enabled only during transient periods, when the output pad signal level is capacitively loaded and thereby held to a previous input state. Successive logic/delay stages between supplemental driver stages smoothes the composite output current waveform.

Dependencies are inferred from the claim text.