High speed, very large (8 megabyte) first in/first out buffer memory (FIFO)
AssigneeThe United States of America as represented by the United States Department of Energy
InventorsAlan E. Baumbaugh, Kelly L. Knickerbocker
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Abstract
A fast FIFO (First In First Out) memory buffer capable of storing data at rates of 100 megabytes per second. The invention includes a data packer which concatenates small bit data words into large bit data words, a memory array having individual data storage addresses adapted to store the large bit data words, a data unpacker into which large bit data words from the array can be read and reconstructed into small bit data words, and a controller to control and keep track of the individual data storage addresses in the memory array into which data from the packer is being written and data to the unpacker is being read.
Claims11
A buffer system for storing a stream of data words from a data source and retrieving the data words for delivery to a data processing system comprising:
- data packer means for forming a series of (P.times.M.times.N)-bit data words from a series, of (P.times.M) N-bit data words, said data packer means adapted to receive the data words from the data source;
- memory array means coupled to said data packer means and responsive to the formation of said series of words to receive at least (P.times.M.times.N)-bit data words from said data packer means, said memory array means having a plurality of individual data storage addresses for storing said series of (P.times.M.times.N)-bit data words;
- data unpacker means coupled to said memory array means and adapted to selectively receive (P.times.M.times.N)-bit data words from said memory array means for sequentially forming a series of N-bit data words from a corresponding series of (P.times.M.times.N)-bit data words stored in said memory array, for transmission to a data processing system;
- control means coupled to said data packer means, said memory array means and said data unpacker means for
- controlling the transfer of P (M.times.N) bit data words into and through said data packer means,
- controlling the transfer of (P.times.M.times.N)-bit data words from said data packer means into individual storage addresses of said memory array means,
- controlling the transfer of (P.times.M.times.N)-bit data words from the individual storage addresses of said memory array means to said data unpacker means, and
- controlling the transfer of P (M.times.N) bit data words through and out of said data unpacker means.
A method of storing and retrieving a high-speed stream of (P.times.N) N-bit data words comprising the steps of:
- conducting the stream of(P.times.M), N-bit data words into a data packer to form a series of (P.times.M.times.N)-bit data words corresponding to said (P.times.M), N-bit data words,
- storing said (P.times.M.times.N)-bit data words in a memory array at individual data storage addresses in said memory array sized to receive said (P.times.M.times.)-bit data words;
- retrieving said (P.times.M.times.N)-bit data words from the individual data storage addresses of said memory array and
- conducting said stream of (P.times.M.times.N)-bit data words into a data unpacker to reform said stream of M, N-bit data words for use by the data processing software.
Dependencies are inferred from the claim text.