Method of manufacturing a semiconductor device involving sidewall spacer formation
AssigneeKabushiki Kaisha Toshiba
InventorsHitoshi Tsuji, Tiharu Kato, Kiyoshi Takaoki
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AssigneeKabushiki Kaisha Toshiba
InventorsHitoshi Tsuji, Tiharu Kato, Kiyoshi Takaoki
Estimating the term…
A method of manufacturing a semiconductor device having a submicron pattern. A p-type semiconductor layer is formed on an n-type semiconductor substrate. Insulating films are formed on the p-type semiconductor layer. A first mask layer, such as an aluminum layer having an etching rate different from that of the insulating films, is formed on the insulating films. A second mask layer having an etching rate different from that of the first mask layer, is formed on the first mask layer. The second mask layer is patterned. A coating film having an etching rate different from that of the first insulating film, is formed on the resultant structure. The coating film is etched to be left on a side wall of the patterned second mask layer. The first mask layer is patterned, using the residual coating film and the patterned second mask layer as masks, and a pattern finer than that of the resist is formed in the first mask layer. The insulating film is patterned, using the patterned first mask layer, and a pattern finer than that of the resist is formed in the insulating film. In the p-type semiconductor layer n+-type emitter and p+ base leading regions are formed, and the n-type semiconductor layer serves as a collector.
A method of manufacturing a semiconductor device, comprising the steps of:
A method of manufacturing a .mu. wave transistor, comprising the steps of:
A method of manufacturing a semiconductor device, comprising the steps of:
A method of manufacturing a semiconductor device, comprising the steps of:
Dependencies are inferred from the claim text.