Bipolar transistor with transient suppressor

Abstract

An integrated circuit includes a substrate of one conductivity type silicon and an epitaxial layer of the opposite conductivity type silicon on a surface of the substrate. An emitter region of the one conductivity type is in the epitaxial layer and a collector region of the one conductivity type is in the epitaxial layer and extends around but is spaced from the emitter region. A third region of the one conductivity type is in the epitaxial layer and extends partly around and is spaced from the collector region. A highly conductive connector region of the opposite conductivity type extends into the epitaxial layer to a buried region of the opposite conductivity type which is along the junction of the epixtaxial layer and the substrate. The connector region contacts the third region. A thin layer of silicon oxide extends over the epitaxial layer. Separate contacts extend through the epixtaxial layer to the emitter region, collector region and to adjacent portions of the third region and the collector region. A conductive gate is on the insulating layer and across the portion of the epitaxial layer between the collector region and the third region. A second layer of silicon oxide is on the first layer and over the contacts and the gate. A conductive strip is on the second silicon oxide layer and extends through openings in the second silicon oxide layer to contact the emitter region contact and the gate. This provides a bipolar transistor having a MOS transistor having its source and drain connected between the collector and base of the bipolar transistor and its gate connector to the emitter of the bipolar transistor.

Dependencies are inferred from the claim text.