Vertical MOSFET and method of manufacturing the same
AssigneeNippon Telegraph and Telephone Corporation
InventorsTakashi Morie, Toshifumi Somatani, Shigeru Nakajima, Kazushige Minegishi, Kenji Miura
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AssigneeNippon Telegraph and Telephone Corporation
InventorsTakashi Morie, Toshifumi Somatani, Shigeru Nakajima, Kazushige Minegishi, Kenji Miura
Estimating the term…
A vertical metal oxide semiconductor field effect transistor has a trench substantially vertically formed in a major surface of a semiconductor substrate, a first conductive layer formed in a predetermined region including a side wall surface of the trench on a gate insulating film, lower and upper diffusion layers formed in the bottom of the trench and a surface layer of the semiconductor substrate, preferably a channel doped region formed in the semiconductor substrate between the upper and lower diffusion layers, and a second conductive layer formed in contact with the lower diffusion layer in the bottom of the trench and insulated from the first conductive layer so as to fill the trench. The first conductive layer serves as a gate electrode, and the diffusion layers serves as source/drain regions, respectively. A method of manufacturing the vertical MOSFET is also proposed.
A vertical metal oxide semiconductor field effect transistor, comprising:
Dependencies are inferred from the claim text.