Method of manufacturing a semiconductor memory device

Abstract

A method of manufacturing a semiconductor memory apparatus comprising a memory cell structure consisting of a transistor and capacitor. The method comprises the steps of forming a groove in the capacitor-forming region of a semiconductor substrate, forming a capacitor insulating film on the surface of the semiconductor substrate, including the inner surface of the groove, providing first and second contact holes in the capacitor insulating film, forming a first conductive film over the entire surface of thus produced structure, patterning the first conductive material, thereby providing a capacitor electrode covering the inner surface of the groove and first contact hole, and an interconnection electrode covering the second contact hole, forming a first interlayer insulating film over the surfaces of the capacitor electrode and interconnection electrode, forming a gate insulating film on that portion of the surface of the semiconductor substrate which lies between the capacitor electrode and interconnection electrode, forming a second conductive film over the entire surface of thus produced structure, and back-etching the second conductive film, to form a gate electrode on the gate insulating film which lies between the capacitor electrode and interconnection electrode.

Dependencies are inferred from the claim text.