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US 4,784,718 AGranted
Method for manufacturing semiconductor device
AssigneeKabushiki Kaisha Toshiba
InventorsTatsuro Mitani, Toshikazu Fukuda
Life of this patent
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Abstract
Disclosed is a semiconductor device with its gate electrode and source/drain extraction electrodes being made of the same material on a GaAs substrate, and with its source/drain heavily doped regions, which are formed by doping Se in a lightly doped semiconductor layer on the GaAs substrate, self-aligned with both gate electrode and source/drain extraction electrodes.
Claims7
A method for manufacturing a semiconductor device comprising the steps of:
- forming a one-conduction type lightly doped semiconductor layer on a semiconductor substrate;
- forming a dummy gate on a predetermined region on said lightly doped semiconductor layer;
- forming a side wall film constituting member on the exposed surface of said lightly doped semiconductor layer, the side wall film constituting member covering said dummy gate;
- performing an anisotropic etching for said side wall film constituting member to form a side wall film on the side of said dummy gate and to expose the surface of said lightly doped semiconductor layer;
- introducing predetermined impurities into said lightly doped semiconductor layer, using as a mask said side wall film and said dummy gate, so as to form heavily doped regions;
- selectively removing said dummy gate so as to expose said lightly doped semiconductor layer therebelow;
- forming an electrode constituting member on said exposed lightly doped semiconductor layer and said heavily doped regions using the remaining side wall film as a mask;
- and
- removing said side wall film and said electrode constituting member deposited thereon so as to form predetermined electrodes on said heavily doped regions and said lightly doped semiconductor layer.
6 more elements
Dependencies are inferred from the claim text.