Gate turn-off thyristor with independent turn-on/off controlling transistors
AssigneeKabushiki Kaisha Toshiba
InventorsAkio Nakagawa, Takashi Shinohe
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AssigneeKabushiki Kaisha Toshiba
InventorsAkio Nakagawa, Takashi Shinohe
Estimating the term…
A gate turn-off thyristor has first and second MOSFETs serving as turn-on and turn-off controlling devices, respectively. A p type semiconductor layer is additionally formed in an n type substrate functioning as a first base in such a manner as to overlap a p type second base layer. The additional layer is different from the second base in impurity concentration, thereby causing the resistivity of the second base to be smaller than that of the additional layer. The first MOSFET has an n type source layer formed in the additional layer to define a surface portion of the additional layer positioned between the source layer and the first base layer as a channel region of the first MOSFET. A turn-on gate layer is provided to cover a surface region of the first base and the channel region of the first MOSFET.
A gate turn-off thyristor comprising:
Dependencies are inferred from the claim text.