Integrated circuit probe parallelism establishing method and apparatus

An apparatus used in testing an integrated circuit wafer having a surface, for establishing parallelism between a first plane within an integrated circuit probe having at least a first, a second and a third test point separately disposed therein about a center of said probe, said test points each also having a distal end thereof and said first plane being defined by the physical location of said distal ends, and a second plane coincident with or parallel to a test surface, comprising:

• wafer support means for supporting the integrated circuit wafer to be tested, the surface of said wafer having at least three contact points therein and defining said test surface;
• means for bringing said test surface into coincidence with said second plane;
• a probe mount for carrying the probe;
• mount support means for supporting the probe mount with the test points facing the test surface and with the first plane generally parallel to the test surface, said mount support means including;
• first support means connected to the probe mount at a first location adjacent to an associated first test point, the first support means supporting the probe mount for movement of the first location in either direction along a first line so as to move the first test point toward and away from the test surface,
• second support means connected to the probe mount at a second location adjacent to an associated second test point, the second location being spaced from the first location, the second support means supporting the probe mount for movement of the second location in either direction along a second line which is generally parallel to the first line so as to move the second test point toward and away from the test surface,
• third support means connected to the probe mount at a third location adjacent to an associated third test point, the third location being spaced from the first and second locations, the third support means supporting the probe mount for movement of the third location in either direction along a third line generally parallel to the first and second lines so as to move the third test point toward and away from the test surface;
• the first, second and third locations of the probe mount being independently moveable along the first, second and third lines so as to tilt the first plane into parallelism with the test surface and thereby with the second plane;
• and
• detection means for detecting contact between each of the first, second and third test points and the contact points within the test surface, whereby parallelism is achieved when all of the first, second and third test points are in contact with the test surface.

A method for establishing parallelism between a first plane containing the ends of test points, including first, second and third spaced apart test points, of an integrated circuit probe and a second plane, the first plane initially being generally parallel to and spaced a first distance in a first direction from the second plane, comprising:

• decreasing the first distance in the first direction between the first and second planes;
• detecting intersection of the end of one of the first, second and third test points and the second plane and thereby defining a second distance;
• decreasing the second distance between the second plane and the remaining two of the first, second and third test points other than said one of the test points;
• detecting intersection of the end of one of the remaining two of the first, second and third test points and the second plane and thereby defining a third distance;
• decreasing the third distance between the second plane and the last of the first, second and third test points other than said one of the test points and said one of the remaining two test points;
• and
• detecting intersection of the last of the first, second and third test points and the second plane, parallelism between the first and second planes being established upon the intersection of all of the first, second and third test points and the second plane.