Digital-to-time converter

A circuit for converting the value of a digital word into a proportional time delay in response to a trigger signal, said circuit comprising,

• a digital-to-analog converter having a first current input and a second current input and a current output and a plurality of parallel-connected, binary-weighted current sources connected between said current inputs and said current output, and wherein said analog-to-digital converter is responsive to said digital word for selectively connecting said current sources between said current inputs and said current output so that a first current whose value is proportional to the value of said digital word passes between said first current input and said current output and so that the overall DAC current flowing between said current inputs and said current output is independent of the value of said digital word,
• means for generating a threshold voltage by passing said first current through a threshold resistor,
• means responsive to said trigger signal for generating an increasing ramp voltage in response to a ramp current,
• means for generating a reference voltage by passing said DAC current through a reference resistor,
• a voltage coupling circuit responsive to said reference voltage for producing a ramp current the magnitude of which is proportional to said reference voltage,
• a differential comparator means responsive to said ramp voltage and said threshold voltage for generating an output representative of said time delay.

A digital-to-time converter circuit for converting the value of a digital word into a proportional time delay in response to a trigger signal, said circuit comprising,

• a threshold resistor,
• a digital-to-analog converter having a first current input connected to said threshold resistor, a second current input connected to power, a current output and a plurality of internal parallel-connected, binary weighted current sources connectable between said current inputs and said current output, and wherein said analog-to-digital converter is responsive to said digital word for selectively connecting said current sources between said current inputs and said current output so that a first current whose value is proportional to the value of said digital word passes through said threshold resistor and so that the overall DAC current flowing between said current inputs and said current output is independent of the value of said digital word,
• a capacitor,
• a ramp resistor connected in series with said capacitor for charging said capacitor by means of a ramp current running through said resistor to generate a ramp voltage,
• a flip-flop responsive to said trigger signal for generating a ramp control signal,
• a control switch normally short circuiting said capacitor, said control switch being responsive to said ramp control signal for allowing said capacitor to charge through said ramp resistor,
• a reference resistor connected in series with said digital-to-analog converter for generating a reference voltage in response to said DAC current,
• a first transistor having a collector connected in series between said capacitor and said ramp resistor,
• a second transistor having a collector connected in series between said digital-to-analog converter and said reference resistor, said first transistor having a base electrode connected to the collector of said second transistor by means of an emitter follower circuit and said second transistor having a base electrode connected to the collector of said first transistor by means of an emitter follower circuit so that the voltage across said reference resistor equals the voltage across said ramp resistor, and
• a differential comparator circuit responsive to said ramp voltage and said threshold voltage for generating an output representative of said time delay.