Process for manufacturing metal-semiconductor field-effect transistors

A method of forming a metal-semiconductor field-effect transistor (MESFET) comprising the steps of:

• providing a semiconductor having a dielectric film;
• implanting ions through said dielectric film to form an N.sup.- layer in a selected area of said semiconductor;
• forming a dummy gate on said dielectric film over said N.sup.- layer using a single-level photoresist process;
• implanting ions through said dielectric film to form an N.sup.+ region in said selected area while using said dummy gate to mask said N.sup.- layer and retain an N.sup.- layer for the gate of said MESFET;
• reducing the length of said dummy gate by reactive ion etching;
• depositing an SiO.sub.x dielectric on said dielectric film covering said N.sup.+ implanted region and on the portion of said N.sup.- layer not covered by said dummy gate, while using said dummy gate to mask the underlying portion of said N.sup.- layer;
• lifting off said dummy gate;
• annealing said N.sup.- layer and said N.sup.+ region;
• etching source and drain openings in said dielectric film and in said SiO.sub.x dielectric;
• depositing ohmic metal contacts in said openings to form the source and drain of said MESFET;
• recessing said N.sup.- layer by exposing it to a reactive ion etch plasma to obtain the desired threshold voltage;
• and
• depositing gate metallization on said N.sup.- layer.