Process for manufacturing a Schottky FET device using metal sidewalls as gates

A process for manufacturing a Schottky FET device, comprising:

• a first step of forming an island-shaped insulative film portion on a surface of a Schottky-junction semiconductor substrate, which has a low-concentration impurity layer on the surface, with the periphery of the insulative film substantially vertical to the substrate surface;
• a second step of forming a gate electrode metal film in a loop shape and with a predetermined thickness on the outer periphery of said island-shaped insulative film portion;
• a third step of forming a first insulative film in a loop shape and with a predetermined thickness on the periphery of said loop-shaped gate electrode metal film;
• a fourth step of forming a second insulative film in a loop shape and with a predetermined thickness of the inner peripheral surface of said loop-shaped gate electrode metal film by removing the center portion of said island-shaped insulation film portion;
• and
• a fifth step of forming source and drain regions, which consist of high-concentration impurity layers, inside said substrate on the outside of said first insulative film and on the inside of said second insulative film by driving a high-concentration of impurities into the surface of said substrate other than on said loop-shaped gate electrode metal film and said first and second insulative films, and at the same time forming a channel of the remainder of said low-concentration impurity layer inside said substrate between said source and drain regions.