US 4,729,007 AGranted

Merged bipolar/field-effect transistors

AssigneeU.S. Philips Corporation

InventorDavid J. Coe

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Abstract

A semiconductor device having the advantages of bipolar transistor characteristics (such as a low ON resistance) and of FET characteristics (such as a rapid turn-off) can be obtained by integrating and merging together in one semiconductor body a bipolar transistor T and two or more insulated-gate FETs T1 to T4. A lateral FET T1 is formed by providing a drain region adjacent to the base region of the bipolar T and an insulated gate overlying an intermediate channel area. A further FET T3 which is of complementary conductivity type to T1 may have a source region provided in the drain region and an insulated gate over a channel area between the source region and the emitter region of T. These insulated gates are connected together, for example as a common gate grid, so permitting T1 to be turned on to extract charge from the base region of the bipolar T during turn off when T3 is turned off to interrupt the terminal connection to the emitter region of bipolar T. A vertical insulated-gate field-effect transistor T4 having the same source region as T3 may be formed in parallel with the bipolar transistor T to share the main current path through the device. A very compact power device structure can be obtained with a two-dimensional array of alternating base regions and drain regions.

Claims9

Dependent claims

A semiconductor device comprising a vertical bipolar transistor having an emitter region of one conductivity type, a base region of the opposite conductivity type, and a higher resistivity body portion of the one conductivity type, the emitter region being provided in the base region and the base region being provided in the higher resistivity body portion of the one conductivity type, which body portion forms at least part of a collector region of the bipolar transistor, a first insulated-gate field-effect transistor connected to the base region, a further insulated-gate field-effect transistor which is of complementary conductivity type to that of the first field-effect transistor and which has a source region of the one conductivity type located adjacent the emitter region, the first field-effect transistor having a drain region of said opposite conductivity type in said body portion located adjacent the base region and having an insulated gate overlying a channel area in a part of said body portion between the base region and the drain region, the further field-effect transistor having an insulated gate over a channel area between the emitter and source regions to provide a gateable connection between the emitter and source regions, which channel area comprises a portion of at least the base region, and the gate of the further field-effect transistor being connected to the gate of the first field-effect transistor to permit the first field-effect transistor to be turned on during operation to extract charge from the base region when the further field-effect transistor is turned off by a signal applied to its gate.

Dependencies are inferred from the claim text.