Method and apparatus for improved metal-insulator-semiconductor device operation
AssigneeGeneral Electric Company
InventorsChing-Yeu Wei, Henry H. Woodbury
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AssigneeGeneral Electric Company
InventorsChing-Yeu Wei, Henry H. Woodbury
Estimating the term…
An improved method and apparatus for reducing edge field enhancement in semiconductor devices such as metal-insulator-semiconductor devices is disclosed. The method comprises the step of biasing a buffer gate which overlies an insulation layer and an area of a substrate in which it is desired to reduce the edge field enhancement at a voltage exceeding the flatband voltage so that a buffered zone is created in the substrate. The apparatus consists of a substrate, a plurality of insulating layers overlying the substrate, at least one gate electrode formed on one of the insulating layers and a buffer gate formed on a second of the insulating layers. When the gate electrode is biased so that a potential well is formed in the substrate, the buffer gate is simultaneously biased so that a buffered zone which adjoins the potential well is formed. This buffered zone results in a decrease in the edge field enhancement observed at the edge of the potential well below the gate electrode and allows the apparatus of the invention to operate in an improved fashion. The method and apparatus of the invention may be incorporated into imaging systems, such as infrared imaging systems, with increased dynamic range.
A method of reducing edge field enhancement at an edge of a potential well during a detection interval wherein during said detection interval said potential well receives incident radiation, said potential well being in a first portion of a semiconductor substrate lying beneath a biased gate electrode of a layered metal-insulator-semiconductor device having a radiation-transparent gate electrode formed on a first layer of the device and a buffer gate at a different layer of the device than the layer upon which the gate electrode is formed, said buffer gate positioned to partially overlap the biased gate electrode and overlie the entire peripheral edge of the potential well comprising the step of preparing the semiconductor substrate to receive radiation by biasing the buffer gate above the flatband voltage with a non-zero bias potential only during said detection interval simultaneous with the biasing of the gate electrode so that a buffer zone is created in a second portion of the semiconductor substrate adjoining and entirely surrounding the potential well and lying beneath the buffer gate.
A method of increasing the maximum injection voltage which may be applied to a radiation-transparent gate electrode of a layered charge injection device having a buffer gate at a different layer of the device than the layer upon which the gate electrode is formed, said gate electrode overlying a potential well in a said charge injection device formed when said gate electrode is biased, and said buffer gate being positioned to partially overlap the gate electrode around the entire periphery of the gate electrode and overlying the entire peripheral edge of the potential well, comprising the step of only simultaneously with biasing the gate electrode, biasing the buffer gate above the flatband voltage with a non-zero bias potential to reduce the edge field along the entire peripheral edge of the potential well.
An improved metal-insulator-semiconductor device comprising a substrate of semiconductor material, a first insulation layer overlying the substrate, a radiation-transparent gate electrode overlying a first portion of the first insulation layer and a first portion of the substrate in which a potential well is formed when the gate electrode is biased, means to isolate said first portion of the substrate which underlines the gate electrode, and a second insulation layer overlying the gate electrode and the first insulation layer;
An improved charge injection device comprising a substrate of a semiconductor material, a first insulation layer overlying the substrate, a radiation-transparent gate electrode overlying a first portion of the first insulation layer and a portion of the substrate in which a potential well is formed when the gate electrode is biased, said gate electrode having an outer edge, a field plate coplanar with the gate electrode, overlying a second portion of the first insulation layer, said field plate having an inner edge spaced from the outer edge of the gate electrode so that an area of separation between the gate electrode and the field plate exists, the gate electrode and the field plate being positioned with respect to each other so that the area of separation between them is substantially smaller than the area of the gate electrode, a second insulation layer overlying the first insulation layer, the gate electrode and the field plate, and a buffer gate overlying the second insulation layer and at least a portion of the area of separation between the gate electrode and the field plate, slightly overlapping the entire outer edge of the gate electrode, and overlying the entire periphery of the potential well, means for applying a non-zero bias voltage to said buffer gate only simultaneous with the biasing of said radiation transparent gate electrode whereby the maximum injection voltage of the improved charge injection device is increased when the buffer gate is biased with a non-zero potential beyond the flatband voltage only at the same time the gate electrode is based.
An improved charge injection device suitable for use in an infrared imaging system having a plurality of charge injection devices fabricated in a common substrate, said improved charge injection device comprising a substrate of semiconductor material;
Dependencies are inferred from the claim text.