Configurable analog integrated circuit

An integrated circuit comprising:

• (a) a plurality of electrically isolated gain cells arranged in a predetermined pattern on a semiconductor body, each gain cell comprising:
• (i) a plurality of active circuit elements electrically interconnected to provide a preconfigured gain stage and a plurality of different, preconfigured output stages, said gain stage and plurality of output stages being disposed on a first level of the semiconductor body;
• and
• (ii) means, disposed on a second different level of the semiconductor body, for electrically interconnecting the gain stage to a selected one, or ones, of the plurality of output stages;
• (b) a plurality of electrically isolated active and passive electrical components having terminals disposed on the first level of the semiconductor body, the plurality of active and passive electrical components being interspersed with the plurality of gain cells;
• and
• (c) means, disposed on the second, different level of the semiconductor body, for electrically interconnecting a selected one, or ones, of the passive and active electrical components with other ones of the passive and active electrical components and with a selected one, or ones, of the plurality of gain cells.

An integrated circuit comprising a plurality of gain cells, each one of the plurality of gain cells comprising:

• a differential amplifier comprising a pair of emitter-coupled transistors, the coupled emitters being connected to a current source, and the collectors of the emitter-coupled transistors being coupled to a pair of transistors configured as a current mirror, one of said collectors being the output of the differential amplifier, said emitter-coupled transistors, current source and current-mirror transistors being disposed on a first level of the integrated circuit;
• a first output stage comprising a transistor disposed on the first level, said first output stage transistor being configured as a common emitter transistor;
• a second output stage comprising a transistor disposed on the first level and having an electrically isolated emitter;
• and
• means, disposed on a second, different level of the integrated circuit, for selectively coupling either:
• (i) the output of the differential amplifier to the first output stage configuring the gain cell as a comparator, with the collector of the first output stage transistor providing an output terminal for the comparator;
• or
• (ii) additionally, the output of the differential amplifier to the base of the second output stage transistor and the emitter of the second output stage transistor to the collector of the first output stage transistor providing an operational amplifier circuit configuration.

An integrated circuit comprising:

• a plurality of gain cells, each gain cell comprising:
• a preconfigured gain stage disposed on a first level of the integrated circuit;
• and, a plurality of preconfigured output stages disposed on the first level;
• means, disposed on a second, different level of the integrated circuit, for electrically connecting the gain stage of a gain cell to a selected one, or ones, of the plurality of output stages of the gain cell;
• and
• wherein the second level connecting means comprises means for electrically interconnecting a first one of the plurality of gain cells with a second one of the plurality of gain cells.