CMOS output buffer providing high drive current with minimum output signal distortion

An output buffer for producing an output at an output terminal comprising:

• a pull-up circuit connected to the output terminal and responsive to a first signal for pulling the output toward a first supply potential when turned on, the pull-up circuit including first and second FETs, each having a gate, a source and a drain, the first and second FETs each having a current path formed by their source and drain connected in parallel between an output terminal and a first supply potential terminal, and delay means connected to the gate of the second FET for delaying turn-on of the second FET with respect to turn-on of the first FET;
• and
• a pull-down circuit connected to the output terminal and responsive to a second signal for pulling the output at the output terminal toward a second supply potential when turned on.

An output buffer for producing an output at an output terminal comprising:

• a pull-up circuit connected to the output terminal and responsive to a first signal for pulling the output toward a first supply potential when turned on;
• and
• a pull-down circuit connected to the output terminal responsive to a second signal for pulling the output at the output terminal toward a second supply potential when turned on, the pull-down circuit including first and second FETs, each having a gate, a source and a drain, the first and second FETs each having a current path formed by their source and drain connected in parallel between the output terminal and a second supply potential terminal, and delay means connected to the gate of the second FET for delaying turn-on of the second FET with respect to turn-on of the first FET.