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US 4,633,105 AGranted
Bootstrap type output circuit
AssigneeNEC Corporation
InventorAkira Tsujimoto
Life of this patent
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AssigneeNEC Corporation
InventorAkira Tsujimoto
Estimating the term…
An improved bootstrap output circuit which can operate stably without being influenced by noise and voltage fluctuation of the substrate. A delay circuit includes a first MIS transistor having a gate receiving a first input signal, a drain connected to a power supply and a source connected to a first node. A second MIS transistor has a gate receiving a second input signal, a drain connected to the first node and a source connected to the ground potential. A third MIS transistor has a gate receiving the second input signal, a drain connected to the power supply and a source connected to a second node. A fourth MIS transistor has a gate connected to the first node, a drain connected to the second node and a source held at the ground potential. A fifth MIS transistor has a gate connected to the second node, a drain connected to the first node and a source connected to the first input signal. The delay circuit generates an output signal from the second node the level of which falls with a predetermined delay after the rise of the first input signal. A driver circuit including a bootstrap circuit makes use of the output at the second node for controlling the charge operation of the bootstrap capacitor.
In a bootstrap type output circuit of the type having a delay section having a first series circuit of first and second field effect transistors coupled between power voltage sources, a second series circuit of third and fourth field effect transistors coupled between said power voltage sources, the gate of said first transistor receiving a first input signal, the gates of said second and third transistors receiving a second input signal, and means for connecting the gate of said fourth transistor to the intermediate junction of said first series circuit, a delay output signal from said delay section being the signal at the intermediate junction of said second series circuit;
A bootstrap circuit comprising:
Dependencies are inferred from the claim text.