Vital code generating circuit
AssigneeAmerican Standard Inc.
InventorJohn O. G. Darrow
Life of this patent
Estimating the term…
Abstract
A vital low frequency code generating circuit having a pair of complementary unijunction transistor relaxation oscillators for producing coincidental pulses in the absence of any failure; and a first initially nonconductive transistor amplifier and a second initially conductive transistor amplifier for saturating a square loop core transformer in a positive direction. The coincidental pulses causing the first transistor amplifier to be rendered nonconductive to unsaturate the square loop core transformer and causing the second transistor amplifier to be rendered conductive to saturate the square loop core transformer in the negative direction, which results in the development of output code pulses only when neither of the relaxation oscillators has drifted appreciably.
Claims20
A vital code generator comprising, first and second relaxation oscillators, said first relaxation oscillator having a first timing circuit for causing the generation of pulses of a given frequency of oscillation, said second relaxation oscillator having a second timing circuit for causing the generation of pulses having substantially the same frequency of oscillation as the given frequency of oscillation, and a coincidence circuit connected to said first and second relaxation oscillators for producing an output signal having a frequency of oscillation corresponding to the given frequency of oscillation of the pulses of said first and second relaxation oscillators only when frequencies of oscillation of the pulses of said first and second relaxation oscillators are in coincidence.
A vital code generating circuit which operates in a vital manner comprising, a first unijunction transistor oscillator having an emitter electrode and a first and a second base electrode, a first R-C timing circuit connected to said emitter electrode of said first unijunction transistor oscillator, said first base electrode of said first unijunction transistor oscillator resistively connected to a first supply voltage, a second unijunction transistor oscillator having an emitter electrode and a first and a second base electrode, a second R-C timing circuit connected to said emitter electrode of said second unijunction transistor oscillator, said first base electrode of said second unijunction transistor oscillator resistively connected to a second supply voltage, said second base electrode of said first unijunction transistor oscillator transformer connected to said first base electrode of said second unijunction transistor oscillator and connected to the input of a first transistor amplifier, said second base electrode of said second unijunction transistor oscillator connected to the input of a second transistor amplifier, and output signals of said first and second amplifiers connected to a coincidence circuit which produces an output when and only when said first and second unijunction transistor oscillators produce pulses which have substantially the same frequency and are in coincidence.
Dependencies are inferred from the claim text.