Five layer semiconductor device with separate insulated turn-on and turn-off gates
AssigneeKabushiki Kaisha Toshiba
InventorHideo Matsuda
Life of this patent
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Abstract
A semiconductor device has first and second layers of n-type conductivity, a third layer of p-type conductivity which is formed between the first and second layers, a fourth layer of p-type conductivity which is in contact with the second layer, and a gate electrode which is capacitively coupled through an insulation layer with the third layer to constitute a MOS gate thyristor. The semiconductor device further has first terminals through which a voltage is supplied to the gate electrode to form a current channel in the third layer portion under the insulation layer, and second terminals for supplying a reverse bias voltage between the first and third layers.
Claims10
A semiconductor device comprising:
- a first layer of p-type conductivity;
- a second layer of n-type conductivity contacting said first layer;
- a third layer of p-type conductivity contacting said second layer;
- a fourth layer of n-type conductivity contacting said third layer;
- a fifth layer of p-type conductivity contacting said fourth layer;
- an anode electrode formed on said first layer;
- a cathode electrode formed on said fourth and fifth layers;
- a first gate electrode insulatively formed over said third layer, forming a first field-effect transistor in cooperation with said second, third and fourth layers and forming a first current channel in the surface of said third layer interposed between said second and fourth layers upon receipt of a turn-on signal, flow of current in said first current channel removing the electrical barrier between said second and third layers and permitting current flow between said anode and cathode electrodes, and
- a second gate electrode insulatively formed over said fourth layer, forming a second field-effect transistor in cooperation with said third, fourth and fifth layers, whereupon application of a turn-off signal to said second electrode forms a second current channel in the surface of said fourth layer interposed between said third and fifth layers, reestablishing the electrical barrier betwen said second and third layers and blocking said current flow between said anode and cathode electrodes.
Dependencies are inferred from the claim text.