US 4,541,002 AGranted

Protective device for a semiconductor integrated circuit including double polysilicon resistor

AssigneeFujitsu Limited

InventorHiroshi Shimada

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Abstract

A protective device for protecting a semiconductor integrated circuit from the destruction phenomenon which occurs due to an extremely high input voltage. The protective device comprises a protective input MIS transistor having a semiconductor substrate, a diffusion region formed in the semiconductor substrate, and an input electrode wiring layer electrically connected to the diffusion region. The input electrode wiring layer does not directly contact the diffusion region, rather, it contacts the diffusion region through a first polysilicon layer and a second polysilicon layer. The first polysilicon layer is formed on an insulating film adjacent to the diffusion region, and the second polysilicon layer is formed so as to be in contact with the first polysilicon layer and the diffusion region. The concentration of impurities in the first polysilicon layer is higher than that in the second polysilicon layer.

Claims9

Dependent claims

A protective device for protecting a semiconductor integrated circuit from static electricity, comprising:

a protective input transistor for protecting the semiconductor integrated circuit from a high input voltage;
a semiconductor substrate;
a diffusion region formed in said semiconductor substrate;
a first insulating film formed on the surface of said semiconductor substrate adjacent to said diffusion region;
a second insulating film formed as an island in said diffusion region;
a first polysilicon layer, having a first concentration of impurities, formed on a portion of said second insulating film;
a second polysilicon layer, having a second concentration of impurities lower than said first concentration of impurities of said first polysilicon layer, formed on a portion of said second insulating film and connecting a peripheral portion of said first polysilicon layer and said diffusion region;
a contact portion formed on a portion of said first polysilicon layer;
an oxidation film, formed over said first insulating film, said exposed portions of said diffusion region and said semiconductor substrate, and said first and second polysilicon layers except for said contact portion, for insulating between layers;
and
an input electrode metal layer, formed over said contact portion, for electrically connecting said diffusion region.

8 more elements

Dependencies are inferred from the claim text.