Capacitive supplement multiplier apparatus

A monolithic integrated circuit for providing a distinct charge aggregation which contains a quantity of charge which is a selected fraction of a quantity of charge contained in another distinct charge aggregation, said circuit comprising:

• a semiconductor material body of a first conductivity type except in selected regions thereof including first, second, third, fourth and fifth selected regions which are of a second conductivity type opposite that of said first conductivity type, said semiconductor material body having a first major surface;
• a charge-coupled device floating gate regenerator having a conductor serving as an inverting floating gate separated from said major surface by first and second insulating layers with said inverting floating gate being across said first and second insulating layers from first and second portions of said semiconductor material body, respectively, where said first and second portions of said semiconductor material body are separated from one another by means sufficient to prevent a distinct charge aggregation in one of said first and second portions from being transferred into that one remaining, and wherein said charge-coupled device floating gate regenerator further has a conductor serving as a non-inverting floating gate separated from said first major surface by third and fourth insulating layers with said non-inverting floating gate being across said third and fourth insulating layers from third and fourth portions of said semiconductor material body, respectively, where said third and fourth portions of said semiconductor material body are separated from one another by means sufficient to prevent a distinct charge aggregation in one of said third and fourth portions from being transferred into that one remaining, and where said second and fourth portions of said semiconductor material body are separated from one another by means sufficient to prevent a distinct charge aggregation in one of said second and fourth portions from being transferred into that one remaining but where said first and third portions of said semiconductor material body are capable of passing charge from one to another through said semiconductor material body;
• and
• a multiplier means including a capacitance selection gate separated from said first major surface by a fifth insulating layer and across from a portion of said semiconductor material body which is immediately adjacent to said first selected region, said non-inverting floating gate being conductively connected to said first selected region, whereby capacitance associated with said first selected region supplements that associated with said non-inverting floating gate such that any charge occurring in said fourth portion of said semiconductor material body affects charge quantities occurring in said third portion of said semiconductor material body to an extent dependent on said capacitance associated with said first selected region as such capacitance is controlled by said capacitance selection gate.