IC Including small signal and power devices

An integrated circuit comprising a P-type silicon substrate;

• a first and second lightly doped N-type epitaxial layers grown over one face of said substrate, one and another isolated epitaxial pockets formed in said epitaxial layers and bounded by said substrate;
• a high power device and a relatively small low power transistor being formed in said one and another pockets, respectively;
• said high power device comprising a first N-type buried layer having been heated and driven from the interface, between said substrate and said first epitaxial layer, deeply downward into said substrate but substantially less deeply upward and only partially through said first epitaxial layer in said one pocket;
• a P-type buried layer extending upward from said interface and through an inner region of and only slightly beyond said first N-type buried layer and into said one epitaxial pocket but not downward beyond said buried N-type layer into said P-type substrate;
• an annular P-type sub-isolation wall extending from the outer surface of said second epitaxial layer to said P-type buried layer, enclosing an epitaxial sub-pocket therewithin;
• a shallow heavily doped N-type region in said sub-pocket surface forming an N.sup.+ N junction therewith, said N.sup.+ N junction being spaced from said P-type buried layer by less than a holes diffusion length in said lightly doped sub-pocket;
• said low power transistor comprising at least one doped region extending into said first and second epitaxial layers from the common boundary there between.