Semiconductor device and method for production thereof
AssigneeFujitsu Limited
InventorKazunari Shirai
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AssigneeFujitsu Limited
InventorKazunari Shirai
Estimating the term…
A plural layered wiring which comprises a plurality of polycrystal semiconductor layers can be improved in its magnitude of circuit integration, when one or more upper polycrystal semiconductor layers which is or are doped to a moderate impurity concentration is or are utilized as resistor elements, the lowest polycrystal semiconductor layer which is highly doped is utilized for electrodes and/or wirings for active elements, and both polycrystal layers are connected with each other by regions which are highly doped by upward diffusion of impurities contained in highly doped regions of a substrate, because this configuration entirely avoids the restriction that is imposed for the location of resistor elements arranged in the upper layers. This arrangement is realized by a specific sequential combination of steps which includes a step of upward diffusion of impurities from the highly doped regions of the substrate. An additional advantage of this method is the exclusion of a so-called non-butting process.
A semiconductor device comprising:
Dependencies are inferred from the claim text.