US 4,398,221 AGranted

Facsimile apparatus

AssigneeRicoh Company, Ltd.

InventorShingo Yamaguchi

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Abstract

A horizontal scan sync signal is generated at every predetermined time interval allowing for a time period necessary for one line of video data to be stored in a RAM. In response to the horizontal scan sync signal, a video signal is transferred in parallel to a shift register inside a solid scanning element. When a microprocessor or CPU has failed to take in video data within a predetermined period of time after the appearance of the horizontal scan sync signal, shift clock pulses are forcibly generated so that a video signal is coupled from the solid scanning element to a binary circuit. The interval between successive horizontal sync signals, in response to which the CPU takes in each line of video data, may be made relatively short to schedule artificial periods in which the CPU does not take in any video data. By utilizing such a specific period, the components of a video signal output of the solid scanning element which appear within a given period can be processed to prepare a threshold value.

Claims14

Dependent claims

A facsimile apparatus having a random access memory and a microprocessor for encoding data from the random access memory, comprising:

scanner means for producing a serial image or video data output;
binary circuit means for producing a serial binary video data output from the serial video data output of the scanner means;
serial to parallel converter means for converting the serial binary video data output to a parallel binary video data output, the microprocessor being constructed to produce a read strobe when the parallel binary video data output can be inputted to the random access memory after encoding the previous data from the random access memory;
sync signal generator means for producing a sync signal at a predetermined interval, the microprocessor being constructed to produce the read strobe in response to the sync signal;
shift clock pulse generator means for producing shift clock pulses in response to the read strobe from the microprocessor, the scanner being constructed to feed the serial video data output to the binary circuit means in response to the shift clock pulses;
and
control means for controlling the shift clock pulse generator to forcibly produce the shift clock pulses which are fed to the scanner means whether or not the parallel binary data output can be inputted to the random access memory.

4 more elements

Dependencies are inferred from the claim text.