Battery-saving arrangement for pagers

A battery-saving arrangement for selectively addressable devices and comprising:

• transmission means including first means for receiving two-word binary address codes, means for transmitting a sequence of binary signals, means coupled to the receiving means for sorting the received address codes according to predetermined groups of devices, first memory means coupled to the sorting means for storing the sorted address codes by groups, block control means coupled to the first memory means for assembling ones of the sorted and stored address codes into transmission blocks, second memory means coupled to the block control means for storing a first predetermined number of address codes of one of the respective groups of device address codes, first coding means coupled to the block control means for further encoding predetermined ones of the address codes stored in the second memory means, first generator means for generating two-word synchronizing code signals, said synchronizing codes having the same format as the address codes, and including second coding means for selectively further encoding selected ones of the synchronizing code signals, transmission sequence control means coupled to the block control means and to the first generating means for assembling blocks of address codes and synchronizing codes into a sequence and coupled to the transmission means for transmission;
• and
• a plurality of selectively addressable devices, each device including means for receiving the transmission sequence, means for detecting one of the address codes, all of the further encoded address codes and all synchronizing codes, when said codes appear in the transmission sequence, and means for responding to the detection of said one address code.