US 4,397,022 A · Weighted erasure codec for the (24, 12) extended Golay code

Abstract

A codec consists of an encoder and decoder. The encoder provides 12 information bits, 11 parity bits generated according to the polynomial for the (23, 12) Golay code, and an overall parity bit to a transmitter at selected transmit times to form a 24-bit block of data. The decoder is separated into two independent list decoders, a comparator, and common clock generator and output buffers. Each list decoder is divided into a syndrome generator and an overall parity check generator, a syndrome error pattern table, an input buffer, error correction logic, and four-error detection logic. The error pattern table includes a pair of read only memories storing the most likely 12-bit error patterns at each ROM address corresponding to each syndrome. An additional 4-bit output is used to indicate the number of errors in the associated error pattern. The comparator compares the number of errors detected in the two independent decoders and chooses the decoder having the fewer number of errors to provide the corrected data.

Claims16

Dependent claims

An error correcting decoder for receiving a plurality of data bits, at least a portion of said data bits being generated in accordance with a predetermined function, said data bits including information bits and coding bits, said decoder comprising:

generator means for processing said data bits in accordance with said predetermined function to produce a generator output;
memory means receiving said generator output for producing an error pattern in response thereto, said error pattern providing a direct indication of which of said information bis are incorrect;
and
correction means for correcting said information bits in accordance with said error pattern.

1 more element

An error correcting system for receiving a plurality of data bits, at least a portion of said data bits being generated in accordance with a predetermined function, said data bits including information bits and coding bits, said system comprising:

decision means for receiving said data bits and for concurrently providing at least first and second decision outputs in accordance with said data bits;
at least first and second decoders receiving said first and second decision outputs, respectively, and concurrently providing first and second decoded outputs, respectively, said first and second decoders detecting the number of errors in said first and second decision outputs, respectively;
and
selector means for selecting, for further processing in processing means, one of said first and second decoded outputs associated with the decision output having the fewer number of detected errors.

1 more element

Dependencies are inferred from the claim text.

Weighted erasure codec for the (24, 12) extended Golay code

Life of this patent

Weighted erasure codec for the (24, 12) extended Golay code

Life of this patent

Abstract

Claims16